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version 1.1, 2005/10/19 01:15:17
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version 1.2, 2005/10/24 19:35:25
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//%2005//////////////////////////////////////////////////////////////////////// |
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// |
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// Copyright (c) 2000, 2001, 2002 BMC Software; Hewlett-Packard Development |
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// Company, L.P.; IBM Corp.; The Open Group; Tivoli Systems. |
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// Copyright (c) 2003 BMC Software; Hewlett-Packard Development Company, L.P.; |
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// IBM Corp.; EMC Corporation, The Open Group. |
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// Copyright (c) 2004 BMC Software; Hewlett-Packard Development Company, L.P.; |
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// IBM Corp.; EMC Corporation; VERITAS Software Corporation; The Open Group. |
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// Copyright (c) 2005 Hewlett-Packard Development Company, L.P.; IBM Corp.; |
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// EMC Corporation; VERITAS Software Corporation; The Open Group. |
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// |
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// Permission is hereby granted, free of charge, to any person obtaining a copy |
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// of this software and associated documentation files (the "Software"), to |
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// deal in the Software without restriction, including without limitation the |
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// rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
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// sell copies of the Software, and to permit persons to whom the Software is |
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// furnished to do so, subject to the following conditions: |
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// |
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// THE ABOVE COPYRIGHT NOTICE AND THIS PERMISSION NOTICE SHALL BE INCLUDED IN |
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// ALL COPIES OR SUBSTANTIAL PORTIONS OF THE SOFTWARE. THE SOFTWARE IS PROVIDED |
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// "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT |
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// LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR |
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// PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
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// HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
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// ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
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// WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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// |
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//============================================================================== |
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// |
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// Author: Mike Brasher (mike-brasher@austin.rr.com) - Inova Europe |
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// |
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//%///////////////////////////////////////////////////////////////////////////// |
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#ifndef _Pegasus_Common_AtomicInt_HPUX_PARISC_ACC_h |
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#define _Pegasus_Common_AtomicInt_HPUX_PARISC_ACC_h |
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#include <Pegasus/Common/Config.h> |
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#include <machine/sys/inline.h> |
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PEGASUS_NAMESPACE_BEGIN |
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#define PEGASUS_ATOMIC_UNLOCKED_MASK 0x80000000 |
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inline Uint32 AtomicLoadAndClear(volatile Uint32* x) |
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{ |
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#if 1 |
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// Warning: x must be aligned on a 16-byte boundary on older PA-RISC chips. |
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register Uint32 volatile* addr = (Uint32 volatile*)x; |
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register Uint32 t = 0; |
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// This memory access speeds up LDCWS according to HP documentation. |
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((volatile char*)(x + 1))[0] = 0; |
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_asm("LDCWS,CO",0,0,addr,t); |
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return t; |
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#else |
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// Non-thread-safe version for testing with single thread. |
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Uint32 t = *x; |
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*x = 0; |
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return t; |
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#endif |
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} |
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inline Uint32 AtomicObtainSpinlock(volatile Uint32* x) |
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{ |
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Uint32 t; |
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// Spin here while not available. |
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while (*x == 0 || (t = AtomicLoadAndClear(x)) == 0) |
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; |
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return t; |
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} |
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struct AtomicType |
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{ |
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// This is the only data type that is aligned on a 16 byte boundary |
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// (a requirement of the LDCWS instruction used in this module). |
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#if 1 |
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volatile __float80 rep; |
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#else |
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char rep[16]; |
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#endif |
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}; |
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inline volatile Uint32* AtomicCounter(AtomicType* a) |
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{ |
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return (volatile Uint32*)a; |
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} |
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PEGASUS_TEMPLATE_SPECIALIZATION |
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inline AtomicIntTemplate<AtomicType>::AtomicIntTemplate(Uint32 n) |
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{ |
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*AtomicCounter(&_rep) = PEGASUS_ATOMIC_UNLOCKED_MASK | n; |
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} |
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PEGASUS_TEMPLATE_SPECIALIZATION |
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inline AtomicIntTemplate<AtomicType>::~AtomicIntTemplate() |
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{ |
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// Nothing to do! |
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} |
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PEGASUS_TEMPLATE_SPECIALIZATION |
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inline Uint32 AtomicIntTemplate<AtomicType>::get() const |
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{ |
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Uint32 t; |
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// Spin here until available. |
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volatile Uint32* c = AtomicCounter((AtomicType*)&_rep); |
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while ((t = *c) == 0) |
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; |
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return ~PEGASUS_ATOMIC_UNLOCKED_MASK & t; |
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} |
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PEGASUS_TEMPLATE_SPECIALIZATION |
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inline void AtomicIntTemplate<AtomicType>::set(Uint32 n) |
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{ |
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volatile Uint32* c = AtomicCounter(&_rep); |
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AtomicObtainSpinlock(c); |
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*c = PEGASUS_ATOMIC_UNLOCKED_MASK | n; |
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} |
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PEGASUS_TEMPLATE_SPECIALIZATION |
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inline void AtomicIntTemplate<AtomicType>::inc() |
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{ |
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volatile Uint32* c = AtomicCounter(&_rep); |
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Uint32 t = AtomicObtainSpinlock(c); |
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*c = t + 1; |
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} |
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PEGASUS_TEMPLATE_SPECIALIZATION |
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inline void AtomicIntTemplate<AtomicType>::dec() |
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{ |
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volatile Uint32* c = AtomicCounter(&_rep); |
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Uint32 t = AtomicObtainSpinlock(c); |
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*c = t - 1; |
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} |
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PEGASUS_TEMPLATE_SPECIALIZATION |
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inline bool AtomicIntTemplate<AtomicType>::decAndTestIfZero() |
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{ |
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volatile Uint32* c = AtomicCounter(&_rep); |
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Uint32 t = AtomicObtainSpinlock(c); |
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t -= 1; |
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*c = t; |
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return (~PEGASUS_ATOMIC_UNLOCKED_MASK & t) == 0; |
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} |
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PEGASUS_NAMESPACE_END |
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#endif /* _Pegasus_Common_AtomicInt_HPUX_PARISC_ACC_h */ |
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