1 karl 1.1 // ===================================================================
2 // Title: Device Processor
3 // $State: Preliminary $
4 // $Date: 2004/06/25 16:11:06 $
5 // $Source: /home/dmtf2/dotorg/var/cvs/repositories/dev/Schema/MOF/Device_Processor.mof,v $
6 // $Revision: 1.6 $
7 // ===================================================================
8 //#pragma inLine ("Includes/copyright.inc")
9 // Copyright 1998-2004 Distributed Management Task Force, Inc. (DMTF).
10 // All rights reserved.
11 // DMTF is a not-for-profit association of industry members dedicated
12 // to promoting enterprise and systems management and interoperability.
13 // DMTF specifications and documents may be reproduced for uses
14 // consistent with this purpose by members and non-members,
15 // provided that correct attribution is given.
16 // As DMTF specifications may be revised from time to time,
17 // the particular version and release date should always be noted.
18 //
19 // Implementation of certain elements of this standard or proposed
20 // standard may be subject to third party patent rights, including
21 // provisional patent rights (herein "patent rights"). DMTF makes
22 karl 1.1 // no representations to users of the standard as to the existence
23 // of such rights, and is not responsible to recognize, disclose, or
24 // identify any or all such third party patent right, owners or
25 // claimants, nor for any incomplete or inaccurate identification or
26 // disclosure of such rights, owners or claimants. DMTF shall have no
27 // liability to any party, in any manner or circumstance, under any
28 // legal theory whatsoever, for failure to recognize, disclose, or
29 // identify any such third party patent rights, or for such party's
30 // reliance on the standard or incorporation thereof in its product,
31 // protocols or testing procedures. DMTF shall have no liability to
32 // any party implementing such standard, whether such implementation
33 // is foreseeable or not, nor to any patent owner or claimant, and shall
34 // have no liability or responsibility for costs or losses incurred if
35 // a standard is withdrawn or modified after publication, and shall be
36 // indemnified and held harmless by any party implementing the
37 // standard from any and all claims of infringement by a patent owner
38 // for such implementations.
39 //
40 // For information about patents held by third-parties which have
41 // notified the DMTF that, in their opinion, such patent may relate to
42 // or impact implementations of DMTF standards, visit
43 karl 1.1 // http://www.dmtf.org/about/policies/disclosures.php.
44 //#pragma inLine
45 // ===================================================================
46 // Description: The Device Model extends the management concepts that
47 // are related to LogicalDevices. This file defines the
48 // objects to manage watch dog timers and processors.
49 //
50 // The object classes below are listed in an order that
51 // avoids forward references. Required objects, defined
52 // by other working groups, are omitted.
53 // ==================================================================
54 // Change Log for v2.8 Final
55 // CR1298 - Add Socket 939 to Process.UpgradeMethod
56 //
57 // Change Log for v2.8 Final
58 // CR1152 - Add new transmeta processor
59 //
60 // Change Log for v2.8 Preliminary
61 // CR951 - Add Intel(R) Pentium(R) 4 M
62 // to Processor.Family
63 // CR1095 - Correct processor.family
64 karl 1.1 //
65 // Change Log for v2.7 Final
66 // CR928 - Correction of AMD processor values for values 182 & 183.
67 // - Add Socket 754 and Socket 940 to the values to Processor.
68 // UpgradeMethod.
69 // CR995 - Update processor Family
70 // to include mainframes.
71 //
72 // Change Log for v2.7
73 // CR616 - Extend Processor.UpgradeMethod to include Socket 478
74 // CR622 - Fix the DMI mapping string to include the attribute number
75 // Processor.Family, .UpgradeMethod, .MaxClockSpeed, &
76 // .CurrentClockSpeed
77 // CR771 - Add the Composition qualifer to ComputerSystemProcessor
78 // CR772 - Extend Processor.Family to include AMD AthlonXP(TM) and
79 // AMD AthlonMP(TM)
80 // CR839 - Add Itanium 2 to Processor.Family
81 // CR893 - Add Intel(R) Pentium(R) 4 processor with HT Technology
82 // to Processory.Family
83 // CR897 - Deprecate the association, ComputerSystemProcessor
84 // ==================================================================
85 karl 1.1
86 #pragma locale ("en_US")
87
88
89 // ===================================================================
90 // WatchDog
91 // ===================================================================
92 [Version ( "2.7.0" ), Description (
93 "CIM_Watchdog is a timer implemented in system hardware. It "
94 "allows the hardware to monitor the state of the Operating "
95 "System, BIOS or a software component installed on the System. "
96 "If the monitored component fails to re-arm the timer before "
97 "its expiration, the hardware assumes that the System is in a "
98 "critical state, and could reset the ComputerSystem. This "
99 "feature can also be used as an application watchdog timer for "
100 "a mission-critical application. In this case, the application "
101 "would assume responsibility for re-arming the timer before "
102 "expiration.")]
103 class CIM_Watchdog : CIM_LogicalDevice {
104
105 [Description (
106 karl 1.1 "The entity that is currently being monitored by the "
107 "WatchDog. This property is used to identify the module that "
108 "is responsible for or whose information is used to re-arm "
109 "the watchdog at periodic intervals."),
110 ValueMap { "0", "1", "2", "3", "4", "5", "6", "7", "8" },
111 Values { "Unknown", "Other", "Operating System",
112 "Operating System Boot Process",
113 "Operating System Shutdown Process", "Firmware Boot Process",
114 "BIOS Boot Process", "Application", "Service Processor" }]
115 uint16 MonitoredEntity;
116
117 [Description (
118 "A string describing more textual information about the "
119 "monitored entity."),
120 MaxLen ( 256 )]
121 string MonitoredEntityDescription;
122
123 [Description (
124 "The timeout interval used by the watchdog, in MicroSeconds."),
125 Units ( "MicroSeconds" )]
126 uint32 TimeoutInterval;
127 karl 1.1
128 [Description (
129 "Resolution of the timer. For example, if this value is 100, "
130 "then the timer can expire anytime between (TimeoutInterval- "
131 "100) microseconds or (TimeoutInterval+100) microseconds."),
132 Units ( "MicroSeconds" )]
133 uint32 TimerResolution;
134
135 [Description (
136 "The time of the last timer expiry.")]
137 datetime TimeOfLastExpiration;
138
139 [Description (
140 "Monitored entity at the time of last timer expiry."),
141 ValueMap { "0", "1", "2", "3", "4", "5", "6", "7", "8" },
142 Values { "Unknown", "Other", "Operating System",
143 "Operating System Boot Process",
144 "Operating System Shutdown Process", "Firmware Boot Process",
145 "BIOS Boot Process", "Application", "Service Processor" }]
146 uint16 MonitoredEntityOnLastExpiration;
147
148 karl 1.1 [Description (
149 "The action that should happen upon the expiry of the "
150 "watchdog."),
151 ValueMap { "0", "1", "2", "3", "4", "5" },
152 Values { "None - Status Only", "System Reset",
153 "System Power Off", "System Power Off, then On",
154 "Generate System NonMaskableInterrupt (NMI)",
155 "Generate System Management Interrupt (SMI)" }]
156 uint16 ActionOnExpiration;
157
158 [Description (
159 "A method to re-arm the timer. This method is only used if "
160 "the MonitoredEntity is \"Application\". It returns 0 if "
161 "successful, 1 if unsupported, and any other value if an "
162 "error occurred. In a subclass, the set of possible return "
163 "codes could be specified, using a ValueMap qualifier on the "
164 "method. The strings to which the ValueMap contents are "
165 "'translated' may also be specified in the subclass as a "
166 "Values array qualifier.")]
167 uint32 KeepAlive();
168 };
169 karl 1.1
170
171 // ===================================================================
172 // Processor
173 // ===================================================================
174 [Version ( "2.8.1000" ), Description (
175 "Capabilities and management of the Processor LogicalDevice.")]
176 class CIM_Processor : CIM_LogicalDevice {
177
178 [Description (
179 "A free form string describing the role of the Processor - "
180 "for example, \"Central Processor\" or \"Math Processor\".")]
181 string Role;
182 [Description (
183 "The Processor family type. For example, values include "
184 "\"Pentium(R) processor with MMX(TM) technology\" (14) and "
185 "\"68040\" (96)."),
186 //#pragma inLine ("Includes\ProcessorFamily.inc")
187 ValueMap { "1", "2", "3", "4", "5", "6", "7", "8", "9", "10",
188 // 11
189 "11", "12", "13", "14", "15", "16", "17", "18", "19",
190 karl 1.1 // 24
191 "24", "25", "26", "27", "28", "29", "30", "31", "32", "33",
192 "34", "35", "36", "37", "38", "39",
193 // 48
194 "48", "49", "50", "51", "52", "53", "54", "55",
195 // 64
196 "64", "65", "66", "67", "68", "69",
197 // 80
198 "80", "81", "82", "83", "84", "85", "86", "87", "88",
199 // 96
200 "96", "97", "98", "99", "100", "101",
201 // 112
202 "112", "120", "121", "122", "128", "130", "131", "132",
203 // 144
204 "144", "145", "146", "147", "148", "149", "150",
205 // 160
206 "160", "176", "177", "178", "179", "180", "181", "182",
207 "183", "184", "185",
208 // 190
209 "190",
210 // 200
211 karl 1.1 "200", "201", "202", "203", "204",
212 // 250
213 "250", "251", "260", "261", "280", "281",
214 // 300
215 "300", "301", "302", "320", "350", "500" },
216 Values { "Other", "Unknown", "8086", "80286", "80386", "80486",
217 "8087", "80287", "80387", "80487",
218 // 11
219 "Pentium(R) brand", "Pentium(R) Pro", "Pentium(R) II",
220 "Pentium(R) processor with MMX(TM) technology",
221 "Celeron(TM)", "Pentium(R) II Xeon(TM)", "Pentium(R) III",
222 "M1 Family", "M2 Family",
223 // 24
224 "K5 Family", "K6 Family", "K6-2", "K6-3",
225 "AMD Athlon(TM) Processor Family",
226 "AMD(R) Duron(TM) Processor", "AMD29000 Family",
227 // 31
228 "K6-2+", "Power PC Family", "Power PC 601", "Power PC 603",
229 "Power PC 603+", "Power PC 604", "Power PC 620",
230 "Power PC X704", "Power PC 750",
231 // 48
232 karl 1.1 "Alpha Family", "Alpha 21064", "Alpha 21066", "Alpha 21164",
233 "Alpha 21164PC", "Alpha 21164a", "Alpha 21264",
234 "Alpha 21364",
235 // 64
236 "MIPS Family", "MIPS R4000", "MIPS R4200", "MIPS R4400",
237 "MIPS R4600", "MIPS R10000",
238 // 80
239 "SPARC Family", "SuperSPARC","microSPARC II",
240 "microSPARC IIep", "UltraSPARC", "UltraSPARC II",
241 "UltraSPARC IIi", "UltraSPARC III", "UltraSPARC IIIi",
242 // 96
243 "68040", "68xxx Family", "68000", "68010", "68020", "68030",
244 // 112
245 "Hobbit Family", "Crusoe(TM) TM5000 Family",
246 "Crusoe(TM) TM3000 Family", "Efficeon(TM) TM8000 Family",
247 "Weitek", "Itanium(TM) Processor",
248 "AMD Athlon(TM) 64 Processor Family",
249 "AMD Opteron(TM) Processor Family",
250 // 144
251 "PA-RISC Family", "PA-RISC 8500", "PA-RISC 8000",
252 "PA-RISC 7300LC", "PA-RISC 7200", "PA-RISC 7100LC",
253 karl 1.1 "PA-RISC 7100",
254 // 160
255 "V30 Family", "Pentium(R) III Xeon(TM)",
256 "Pentium(R) III Processor with Intel(R) SpeedStep(TM) "
257 "Technology", "Pentium(R) 4", "Intel(R) Xeon(TM)",
258 // 180
259 "AS400 Family", "Intel(R) Xeon(TM) processor MP",
260 "AMD Athlon(TM) XP Family", "AMD Athlon(TM) MP Family",
261 "Intel(R) Itanium(R) 2", "Intel(R) Pentium(R) M processor",
262 // 190
263 "K7",
264 // 200
265 "S/390 and zSeries Family", "ESA/390 G4", "ESA/390 G5",
266 "ESA/390 G6", "z/Architectur base",
267 // 250
268 "i860", "i960", "SH-3", "SH-4", "ARM", "StrongARM",
269 // 300
270 "6x86", "MediaGX", "MII", "WinChip", "DSP",
271 "Video Processor" },
272 //#pragma inLine
273 MappingStrings { "MIF.DMTF|Processor|017.3" },
274 karl 1.1 ModelCorrespondence { "CIM_Processor.OtherFamilyDescription" }]
275 uint16 Family;
276
277 [Description (
278 "A string describing the Processor Family type - used when "
279 "the Family property is set to 1 (\"Other\"). This string "
280 "should be set to NULL when the Family property is any value "
281 "other than 1."),
282 MaxLen ( 64 ),
283 ModelCorrespondence { "CIM_Processor.Family" }]
284 string OtherFamilyDescription;
285
286 [Description (
287 "CPU socket information including data on how this Processor "
288 "can be upgraded (if upgrades are supported). This property "
289 "is an integer enumeration."),
290 ValueMap { "1", "2", "3", "4", "5", "6", "7", "8", "9", "10",
291 "11", "12", "13", "14", "15", "16", "17", "18" },
292 Values { "Other", "Unknown", "Daughter Board", "ZIF Socket",
293 "Replacement/Piggy Back", "None", "LIF Socket", "Slot 1",
294 "Slot 2", "370 Pin Socket", "Slot A", "Slot M", "Socket 423",
295 karl 1.1 "Socket A (Socket 462)", "Socket 478", "Socket 754",
296 "Socket 940", "Socket 939" },
297 MappingStrings { "MIF.DMTF|Processor|017.7" }]
298 uint16 UpgradeMethod;
299
300 [Description (
301 "The maximum speed (in MHz) of this Processor."),
302 Units ( "MegaHertz" ),
303 MappingStrings { "MIF.DMTF|Processor|017.5" }]
304 uint32 MaxClockSpeed;
305
306 [Description (
307 "The current speed (in MHz) of this Processor."),
308 Units ( "MegaHertz" ),
309 MappingStrings { "MIF.DMTF|Processor|017.6" }]
310 uint32 CurrentClockSpeed;
311
312 [Description (
313 "Processor data width in bits."),
314 Units ( "Bits" )]
315 uint16 DataWidth;
316 karl 1.1
317 [Description (
318 "Processor address width in bits."),
319 Units ( "Bits" )]
320 uint16 AddressWidth;
321
322 [Description (
323 "Loading of this Processor, averaged over the last minute, "
324 "in Percent."),
325 Units ( "Percent" ), Gauge,
326 MappingStrings { "MIB.IETF|HOST-RESOURCES-MIB.hrProcessorLoad" }]
327 uint16 LoadPercentage;
328
329 [Description (
330 "Stepping is a free-form string indicating the revision "
331 "level of the Processor within the Processor.Family."),
332 ModelCorrespondence { "CIM_Processor.Family" }]
333 string Stepping;
334
335 [Description (
336 "A globally unique identifier for the Processor. This "
337 karl 1.1 "identifier may only be unique within a Processor Family.")]
338 string UniqueID;
339
340 [Description (
341 "The CPUStatus property indicates the current status of the "
342 "Processor. For example, it may be disabled by the user via "
343 "BIOS (value=2), or disabled due to a POST error (value= 3). "
344 "Information in this property can be obtained from SMBIOS, "
345 "the Type 4 structure, the Status attribute."),
346 ValueMap { "0", "1", "2", "3", "4", "7" },
347 Values { "Unknown", "CPU Enabled",
348 "CPU Disabled by User via BIOS Setup",
349 "CPU Disabled By BIOS (POST Error)", "CPU Is Idle", "Other" }]
350 uint16 CPUStatus;
351 };
352
353
354 // ===================================================================
355 // ComputerSystemProcessor
356 // ===================================================================
357 [Association, Deprecated { "CIM_SystemDevice" }, Aggregation,
358 karl 1.1 Composition, Version ( "2.7.0" ), Description (
359 "Association indicating the processor(s) of a UnitaryComputer "
360 "System. ComputerSystemProcessor is depreacted in lieu of its "
361 "superclass, SystemDevice, since it adds no detail and changes "
362 "none of the cardinalities in the superclass' definition.")]
363 class CIM_ComputerSystemProcessor : CIM_SystemDevice {
364
365 [Deprecated { "CIM_SystemDevice.GroupComponent" }, Aggregate,
366 Override ( "GroupComponent" ), Description (
367 "The UnitaryComputerSystem.")]
368 CIM_UnitaryComputerSystem REF GroupComponent;
369
370 [Deprecated { "CIM_SystemDevice.PartComponent" },
371 Override ( "PartComponent" ), Description (
372 "The Processor which is part of the UnitaryComputerSystem.")]
373 CIM_Processor REF PartComponent;
374 };
375
376
377 // ===================================================================
378 // end of file
379 karl 1.1 // ===================================================================
|
Return to
Device_Processor.mof
CVS log
Up to [Pegasus] / pegasus / Schemas / CIMPrelim29