1 tony 1.1 // ===================================================================
2 // Title: Device Controller 2.8
3 // Filename: Device28_Contoller.mof
4 // Version: 2.8
5 // Release: Preliminary
6 // Date: 06/03/2003
7 // ===================================================================
8 // Copyright 1998-2003 Distributed Management Task Force, Inc. (DMTF).
9 // All rights reserved.
10 // DMTF is a not-for-profit association of industry members dedicated
11 // to promoting enterprise and systems management and interoperability.
12 // DMTF specifications and documents may be reproduced for uses
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14 // provided that correct attribution is given.
15 // As DMTF specifications may be revised from time to time,
16 // the particular version and release date should always be noted.
17 //
18 // Implementation of certain elements of this standard or proposed
19 // standard may be subject to third party patent rights, including
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23 // identify any or all such third party patent right, owners or
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43 tony 1.1 // ===================================================================
44 // Description: The Device Model extends the management concepts that
45 // are related to LogicalDevices. This file defines
46 // the concepts and classes for Controllers.
47 //
48 // The object classes below are listed in an order that
49 // avoids forward references. Required objects, defined
50 // by other working groups, are omitted.
51 // ==================================================================
52 // Change Log for v2.8 Preliminary
53 // CR1071 - Reintroduce PortController and SCSILun.
54 // CR885 - Add Serial ATA to Controller.protocolssupported
55 // CR1015 - ProtocolController:
56 // - Change descriptions for controller,controlledby
57 // - deprecate scsicontroller,scsiinterface
58 // - remove SCSILun
59 //
60 // Change Log for v2.7 Final
61 // CR934 - Remove Controller.PortNumber
62 // CR971 - Remove PortController and SCSILUN, so they can remain
63 // experimental in 2.8.
64 tony 1.1 //
65 // Change Log for v2.7
66 // CR622 - Fix the DMI mapping string to include the attribute number
67 // for Controller.ProtocolSupported, .MaxNumberControlled, &
68 // .ProtocolDescription,
69 // SCSIController.MaxDataWidth & .MaxTransferRate,
70 // SCSIInterface.InitiatorId, .TargetId & .SCSISignal
71 // CR632 - Add PortController
72 // CR654 - Update the description for Controller
73 // - Add Controller.PortNumber
74 // - Update the Description for ControlledBy
75 // - Add ControlledBy.DeviceNumber
76 // - Add SCSILUN
77 // CR830 - Update the Description for ControlledBy
78 // - Modify type of ControlledBy.DeviceNumber from uint64 to
79 // a string
80 // - Add ControlledBy.AccessMode and ControlledBy.AccessPriority
81 // - Update SCSILUN.DeviceNumber to match change to ContolledBy
82 // CR892 - Fix the subclassing inconsistency of VideoController
83 // ==================================================================
84
85 tony 1.1 #pragma locale ("en_US")
86
87
88 // ===================================================================
89 // Controller
90 // ===================================================================
91 [Abstract, Version ("2.7.1000"), Description (
92 "Controller is a superclass for grouping the miscellaneous "
93 "control-related Devices that provide a 'classic' bus master "
94 "interface. Examples of Controllers are USBControllers, "
95 "SerialControllers, etc. The Controller class is an "
96 "abstraction for Devices with a single protocol stack, which "
97 "exist to control communications (data, control, and reset) to "
98 "'downstream' devices. Note that a new abstract class "
99 "(ProtocolController) has been created to model more complex "
100 "interface controllers such as SCSI.") ]
101 class CIM_Controller : CIM_LogicalDevice {
102
103 [Description (
104 "Time of last reset of the Controller.") ]
105 datetime TimeOfLastReset;
106 tony 1.1
107 [Description (
108 "The protocol used by the Controller to access 'controlled' "
109 "Devices."),
110 ValueMap {"1", "2", "3", "4", "5", "6", "7", "8", "9", "10",
111 "11", "12", "13", "14", "15", "16", "17", "18", "19", "20",
112 "21", "22", "23", "24", "25", "26", "27", "28", "29", "30",
113 "31", "32", "33", "34", "35", "36", "37", "38", "39", "40",
114 "41", "42", "43", "44", "45", "46", "47", "48"},
115 Values {"Other", "Unknown", "EISA", "ISA", "PCI", "ATA/ATAPI",
116 "Flexible Diskette", "1496", "SCSI Parallel Interface",
117 // 10
118 "SCSI Fibre Channel Protocol", "SCSI Serial Bus Protocol",
119 "SCSI Serial Bus Protocol-2 (1394)",
120 "SCSI Serial Storage Architecture", "VESA", "PCMCIA",
121 "Universal Serial Bus", "Parallel Protocol", "ESCON",
122 "Diagnostic",
123 // 20
124 "I2C", "Power", "HIPPI", "MultiBus", "VME", "IPI", "IEEE-488",
125 "RS232", "IEEE 802.3 10BASE5", "IEEE 802.3 10BASE2",
126 // 30
127 tony 1.1 "IEEE 802.3 1BASE5", "IEEE 802.3 10BROAD36",
128 "IEEE 802.3 100BASEVG", "IEEE 802.5 Token-Ring",
129 "ANSI X3T9.5 FDDI", "MCA", "ESDI", "IDE", "CMD", "ST506",
130 // 40
131 "DSSI", "QIC2", "Enhanced ATA/IDE", "AGP",
132 "TWIRP (two-way infrared)", "FIR (fast infrared)",
133 "SIR (serial infrared)", "IrBus", "Serial ATA"},
134 MappingStrings {"MIF.DMTF|Bus Port|004.2",
135 "MIF.DMTF|Disks|003.3"},
136 ModelCorrespondence {"CIM_Controller.ProtocolDescription"} ]
137 uint16 ProtocolSupported;
138
139 [Description (
140 "Maximum number of directly addressable entities supported "
141 "by this Controller. A value of 0 should be used if the "
142 "number is unknown or unlimited."),
143 MappingStrings {"MIF.DMTF|Bus Port|004.9"} ]
144 uint32 MaxNumberControlled;
145
146 [Description (
147 "A free form string providing more information related to "
148 tony 1.1 "the ProtocolSupported by the Controller."),
149 MappingStrings {"MIF.DMTF|Bus Port|004.3"},
150 ModelCorrespondence {"CIM_Controller.ProtocolSupported"} ]
151 string ProtocolDescription;
152 };
153
154
155 // ===================================================================
156 // ControlledBy
157 // ===================================================================
158 [Association, Version ("2.7.1000"), Description (
159 "The ControlledBy relationship indicates which Devices are "
160 "controlled by a CIM_Controller.") ]
161 class CIM_ControlledBy : CIM_DeviceConnection {
162
163 [Override ("Antecedent"), Description (
164 "The Controller.") ]
165 CIM_Controller REF Antecedent;
166
167 [Override ("Dependent"), Description (
168 "The controlled Device.") ]
169 tony 1.1 CIM_LogicalDevice REF Dependent;
170
171 [Description (
172 "The State property indicates whether the Controller is "
173 "actively commanding or accessing the Device (value=1) or "
174 "not (value=2). Also, the value, \"Unknown\" (0), can be "
175 "defined. This information is necessary when a "
176 "LogicalDevice can be commanded by, or accessed through, "
177 "multiple Controllers."),
178 ValueMap {"0", "1", "2"},
179 Values {"Unknown", "Active", "Inactive"} ]
180 uint16 AccessState;
181
182 [Description (
183 "The time that the downstream Device was last reset by the "
184 "Controller.") ]
185 datetime TimeOfDeviceReset;
186
187 [Description (
188 "Number of hard resets issued by the Controller. A hard "
189 "reset returns the Device to its initialization or 'boot-up' "
190 tony 1.1 "state. All internal Device state information and data are "
191 "lost."),
192 Counter ]
193 uint32 NumberOfHardResets;
194
195 [Description (
196 "Number of soft resets issued by the Controller. A soft "
197 "reset does not completely clear current Device state and/or "
198 "data. Exact semantics are dependent on the Device, and on "
199 "the protocols and mechanisms used to communicate to it."),
200 Counter ]
201 uint32 NumberOfSoftResets;
202
203 [Experimental, Description (
204 "Address of associated Device in context of the antecedent "
205 "Controller.") ]
206 string DeviceNumber;
207
208 [Experimental, Description (
209 "This property describes the accessibility of the device "
210 "thru the antedecent controller."),
211 tony 1.1 ValueMap {"2", "3", "4"},
212 Values {"ReadWrite", "ReadOnly", "NoAccess"} ]
213 uint16 AccessMode;
214
215 [Experimental, Description (
216 "The property describes the priority given to accesses of "
217 "the device thru this controller. The highest priority path "
218 "will have the lowest value for this parameter.") ]
219 uint16 AccessPriority;
220 };
221
222
223 // ===================================================================
224 // ESCONController
225 // ===================================================================
226 [Version ("2.6.0"), Description (
227 "Capabilities and management of an ESCONController.") ]
228 class CIM_ESCONController : CIM_Controller {
229 };
230
231
232 tony 1.1 // ===================================================================
233 // IDEController
234 // ===================================================================
235 [Version ("2.6.0"), Description (
236 "Capabilities and management of an IDEController.") ]
237 class CIM_IDEController : CIM_Controller {
238 };
239
240
241 // ===================================================================
242 // InfraredController
243 // ===================================================================
244 [Version ("2.6.0"), Description (
245 "Capabilities and management of an InfraredController.") ]
246 class CIM_InfraredController : CIM_Controller {
247 };
248
249
250 // ===================================================================
251 // ManagementController
252 // ===================================================================
253 tony 1.1 [Version ("2.6.0"), Description (
254 "Capabilities and managment of a ManagementController. An I2C "
255 "microcontroller is a type of ManagementController.") ]
256 class CIM_ManagementController : CIM_Controller {
257 };
258
259
260 // ===================================================================
261 // ParallelController
262 // ===================================================================
263 [Version ("2.6.0"), Description (
264 "Capabilities and management of the ParallelController.") ]
265 class CIM_ParallelController : CIM_Controller {
266
267 [Description (
268 "Set to true if the ParallelController supports DMA."),
269 MappingStrings {"MIF.DMTF|Parallel Ports|003.7"} ]
270 boolean DMASupport;
271
272 [Description (
273 "An integer enumeration indicating the capabilities of the "
274 tony 1.1 "ParallelController."),
275 ValueMap {"0", "1", "2", "3", "4", "5", "6", "7", "8"},
276 Values {"Unknown", "Other", "XT/AT Compatible",
277 "PS/2 Compatible", "ECP", "EPP", "PC-98", "PC-98-Hireso",
278 "PC-H98"},
279 ArrayType ("Indexed"),
280 MappingStrings {"MIF.DMTF|Parallel Ports|003.8"},
281 ModelCorrespondence {
282 "CIM_ParallelController.CapabilityDescriptions"} ]
283 uint16 Capabilities[];
284
285 [Description (
286 "An array of free-form strings providing more detailed "
287 "explanations for any of the ParallelController features "
288 "indicated in the Capabilities array. Note, each entry of "
289 "this array is related to the entry in the Capabilities "
290 "array that is located at the same index."),
291 ArrayType ("Indexed"),
292 ModelCorrespondence {"CIM_ParallelController.Capabilities"} ]
293 string CapabilityDescriptions[];
294
295 tony 1.1 [Description (
296 "An enumeration indicating the operational security for the "
297 "Controller. For example, information that the Device's "
298 "external interface is locked out (value=4) or \"Boot "
299 "Bypass\" (value=6) can be described using this property."),
300 ValueMap {"1", "2", "3", "4", "5", "6"},
301 Values {"Other", "Unknown", "None",
302 "External Interface Locked Out",
303 "External Interface Enabled", "Boot Bypass"},
304 MappingStrings {"MIF.DMTF|Parallel Ports|003.10"} ]
305 uint16 Security;
306 };
307
308
309 // ===================================================================
310 // PCMCIAController
311 // ===================================================================
312 [Version ("2.6.0"), Description (
313 "Capabilities and management of a PCMCIAController.") ]
314 class CIM_PCMCIAController : CIM_Controller {
315 };
316 tony 1.1
317
318 // ===================================================================
319 // SCSIController
320 // ===================================================================
321 [Deprecated {"CIM_SCSIProtocolController"}, Version ("2.7.1000"),
322 Description (
323 "The use of this class is deprecated in lieu of "
324 "SCSIProtocolController. The latter reflects the protocol- "
325 "related issues of SCSI interfaces, since these are not bus "
326 "master-type Controllers. Capabilities and management of the "
327 "SCSIController.") ]
328 class CIM_SCSIController : CIM_Controller {
329
330 [Deprecated {"No Value"}, Description (
331 "An integer enumeration indicating whether or not the "
332 "SCSIController provides redundancy or protection against "
333 "device failures."),
334 ValueMap {"1", "2", "3", "4", "5", "6"},
335 Values {"Other", "Unknown", "Unprotected", "Protected",
336 "Protected through SCC (SCSI-3 Controller Command)",
337 tony 1.1 "Protected through SCC-2 (SCSI-3 Controller Command)"},
338 MappingStrings {"MIF.DMTF|Storage Controller|001.3"} ]
339 uint16 ProtectionManagement;
340
341 [Deprecated {"No Value"}, Description (
342 "Maximum data width (in bits) supported by the SCSI "
343 "Controller."),
344 Units ("Bits"),
345 MappingStrings {"MIF.DMTF|Bus Port|004.7"} ]
346 uint32 MaxDataWidth;
347
348 [Deprecated {"No Value"}, Description (
349 "Maximum transfer rate (in Bits per Second) supported by the "
350 "SCSIController."),
351 Units ("Bits per Second"),
352 MappingStrings {"MIF.DMTF|Bus Port|004.8"} ]
353 uint64 MaxTransferRate;
354
355 [Deprecated {"No Value"}, Description (
356 "Number of SCSIController timeouts that have occurred since "
357 "the TimeOfLastReset."),
358 tony 1.1 Counter ]
359 uint32 ControllerTimeouts;
360
361 [Deprecated {"No Value"}, Description (
362 "Signal capabilities that can be supported by the SCSI "
363 "Controller. For example, the Controller may support "
364 "\"Single Ended\" and \"Differential\". In this case, the "
365 "values 3 and 4 would be written to the Signal Capabilities "
366 "array."),
367 ValueMap {"1", "2", "3", "4", "5", "6"},
368 Values {"Other", "Unknown", "Single Ended", "Differential",
369 "Low Voltage Differential", "Optical"},
370 ModelCorrespondence {"CIM_SCSIInterface.SCSISignal"} ]
371 uint16 SignalCapabilities[];
372 };
373
374 // ===================================================================
375 // SCSIInterface
376 // ===================================================================
377 [Association, Deprecated {"CIM_ProtocolControllerAccessesDevice"},
378 Version ("2.7.1000"), Description (
379 tony 1.1 "The use of this class is deprecated in lieu of "
380 "ProtocolControllerForUnit, since the SCSIController class "
381 "involved in this association is itself deprecated. The "
382 "protocol-related aspects of SCSI are better reflected in the "
383 "new classes and associations. SCSIInterface is a ControlledBy "
384 "relationship indicating which Devices are accessed through a "
385 "SCSIController and the characteristics of this access.") ]
386 class CIM_SCSIInterface : CIM_ControlledBy {
387
388 [Deprecated {"No Value"}, Override ("Antecedent"), Description (
389 "The SCSIController.") ]
390 CIM_SCSIController REF Antecedent;
391
392 [Deprecated {"No Value"}, Description (
393 "Number of SCSI timeouts that have occurred since last hard "
394 "or soft reset related to the controlled Device. The time "
395 "of last reset is indicated in the TimeOfDeviceReset "
396 "property, inherited from the ControlledBy association."),
397 Counter ]
398 uint32 SCSITimeouts;
399
400 tony 1.1 [Deprecated {"No Value"}, Description (
401 "Number of SCSI retries that have occurred since last hard "
402 "or soft reset related to the controlled Device. The time "
403 "of last reset is indicated in the TimeOfDeviceReset "
404 "property, inherited from the ControlledBy association."),
405 Counter,
406 MappingStrings {"MIF.DMTF|Mass Storage Statistics|001.18"} ]
407 uint32 SCSIRetries;
408
409 [Deprecated {"No Value"}, Description (
410 "The SCSI Initiator ID."),
411 MappingStrings {"MIF.DMTF|Bus Port|004.5"} ]
412 uint32 InitiatorId;
413
414 [Deprecated
415 {"CIM_ProtocolControllerAccessesDevice.TargetControllerNumber"},
416 Description (
417 "The SCSI Target ID."),
418 MappingStrings {"MIF.DMTF|Bus Port|004.5"} ]
419 uint32 TargetId;
420
421 tony 1.1 [Deprecated {"CIM_ProtocolControllerAccessesDevice.DeviceNumber"},
422 Description (
423 "The SCSI Target LUN."),
424 MappingStrings {"MIF.DMTF|Storage Devices|001.4"} ]
425 uint64 TargetLUN;
426
427 [Deprecated {"No Value"}, Description (
428 "SCSIReservation indicates the type of SCSI reservation that "
429 "currently exists between the source and destination."),
430 ValueMap {"0", "1", "2", "3"},
431 Values {"Unknown", "None", "Simple", "Persistent"} ]
432 uint16 SCSIReservation;
433
434 [Deprecated {"No Value"}, Description (
435 "The SCSI signal characteristics being used for this "
436 "connection. The value listed here must also be listed in "
437 "the SCSIController's SignalCapabilities field."),
438 ValueMap {"1", "2", "3", "4", "5", "6"},
439 Values {"Other", "Unknown", "Single Ended", "Differential",
440 "Low Voltage Differential", "Optical"},
441 MappingStrings {"MIF.DMTF|Bus Port|004.4"},
442 tony 1.1 ModelCorrespondence {"CIM_SCSIController.SignalCapabilities"} ]
443 uint16 SCSISignal;
444
445 [Deprecated {"No Value"}, Description (
446 "Maximum number of Command Descriptor Blocks (CDBs) that can "
447 "be supported by the target. This data can not be obtained "
448 "under all circumstances.") ]
449 uint32 MaxQueueDepth;
450
451 [Deprecated {"No Value"}, Description (
452 "The maximum number of concurrent Command Descriptor Blocks "
453 "(CDBs) that the initiator will send to the target. This "
454 "value should never be greater than MaxQueueDepth.") ]
455 uint32 QueueDepthLimit;
456 };
457
458 // ===================================================================
459 // SerialController
460 // ===================================================================
461 [Version ("2.6.0"), Description (
462 "Capabilities and management of the SerialController.") ]
463 tony 1.1 class CIM_SerialController : CIM_Controller {
464
465 [Description (
466 "The Capabilities property defines chip level compatibility "
467 "for the SerialController. Therefore, this property "
468 "describes the buffering and other capabilities of the "
469 "SerialController, that may be inherent in the chip "
470 "hardware. The property is an enumerated integer."),
471 ValueMap {"1", "2", "3", "4", "5", "6", "160", "161"},
472 Values {"Other", "Unknown", "XT/AT Compatible",
473 "16450 Compatible", "16550 Compatible", "16550A Compatible",
474 // 160
475 "8251 Compatible", "8251FIFO Compatible"},
476 ArrayType ("Indexed"),
477 MappingStrings {"MIF.DMTF|Serial Ports|004.7"},
478 ModelCorrespondence {
479 "CIM_SerialController.CapabilityDescriptions"} ]
480 uint16 Capabilities[];
481
482 [Description (
483 "An array of free-form strings providing more detailed "
484 tony 1.1 "explanations for any of the SerialController features "
485 "indicated in the Capabilities array. Note, each entry of "
486 "this array is related to the entry in the Capabilities "
487 "array that is located at the same index."),
488 ArrayType ("Indexed"),
489 ModelCorrespondence {"CIM_SerialController.Capabilities"} ]
490 string CapabilityDescriptions[];
491
492 [Description (
493 "Maximum baud rate in Bits per Second supported by the "
494 "SerialController."),
495 Units ("Bits per Second"),
496 MappingStrings {"MIF.DMTF|Serial Ports|004.6"} ]
497 uint32 MaxBaudRate;
498
499 [Description (
500 "An enumeration indicating the operational security for the "
501 "Controller. For example, information that the Device's "
502 "external interface is locked out (value=4) or \"Boot "
503 "Bypass\" (value=6) can be described using this property."),
504 ValueMap {"1", "2", "3", "4", "5", "6"},
505 tony 1.1 Values {"Other", "Unknown", "None",
506 "External Interface Locked Out",
507 "External Interface Enabled", "Boot Bypass"},
508 MappingStrings {"MIF.DMTF|Serial Ports|004.9"} ]
509 uint16 Security;
510 };
511
512
513 // ===================================================================
514 // SerialInterface
515 // ===================================================================
516 [Association, Version ("2.6.0"), Description (
517 "SerialInterface is a ControlledBy relationship indicating "
518 "which Devices are accessed through the SerialController and "
519 "the characteristics of this access.") ]
520 class CIM_SerialInterface : CIM_ControlledBy {
521
522 [Override ("Antecedent"), Description (
523 "The SerialController.") ]
524 CIM_SerialController REF Antecedent;
525
526 tony 1.1 [Override ("NegotiatedDataWidth"), Description (
527 "For the SerialInterface, NegotiatedDataWidth is the number "
528 "of data bits to be transmitted, without stop bits or "
529 "parity."),
530 Units ("Bits") ]
531 uint32 NegotiatedDataWidth;
532
533 [Description (
534 "Number of stop bits to be transmitted."),
535 Units ("Bits") ]
536 uint16 NumberOfStopBits;
537
538 [Description (
539 "Information on the parity setting for transmitted data. No "
540 "parity (value=1), even (2) or odd (3) can be specified."),
541 ValueMap {"0", "1", "2", "3"},
542 Values {"Unknown", "None", "Even", "Odd"} ]
543 uint16 ParityInfo;
544
545 [Description (
546 "An integer enumeration indicating the flow control "
547 tony 1.1 "(Xon-Xoff and/or RTS/CTS) for transmitted data."),
548 ValueMap {"0", "1", "2", "3", "4", "5"},
549 Values {"Unknown", "Not Supported", "None", "XonXoff",
550 "RTS/CTS", "Both XonXoff and RTS/CTS"} ]
551 uint16 FlowControlInfo;
552 };
553
554
555 // ===================================================================
556 // SSAController
557 // ===================================================================
558 [Version ("2.6.0"), Description (
559 "Capabilities and management of an SSAController (Serial "
560 "Storage Architecture).") ]
561 class CIM_SSAController : CIM_Controller {
562 };
563
564
565 // ===================================================================
566 // USBController
567 // ===================================================================
568 tony 1.1 [Version ("2.6.0"), Description (
569 "Capabilities and managment of a USB Host Controller.") ]
570 class CIM_USBController : CIM_Controller {
571
572 [Description (
573 "Indicates the latest USB Version supported by the "
574 "Controller. The property is expressed as a Binary-Coded "
575 "Decimal (BCD) where a decimal point is implied between the "
576 "2nd and 3rd digits. For example, a value of 0x201 "
577 "indicates that version 2.01 is supported.") ]
578 uint16 USBVersion;
579
580 [Description (
581 "The type of interface used between the host system software "
582 "and the USBController."),
583 ValueMap {"0", "1", "2", "3"},
584 Values {"Unknown", "Other", "UHCI", "OHCI"},
585 ModelCorrespondence {"CIM_USBController.ControllerVersion"} ]
586 uint16 InterfaceType;
587
588 [Description (
589 tony 1.1 "Indicates the version of the USB Host Controller register "
590 "set, specific to the InterfaceType. The property is "
591 "expressed as a Binary-Coded Decimal (BCD) value where a "
592 "decimal point is implied between the 2nd and 3rd digits. "
593 "For example, a value of 0x103 indicates that version 1.03 "
594 "is supported."),
595 ModelCorrespondence {"CIM_USBController.InterfaceType"} ]
596 uint16 ControllerVersion;
597 };
598
599
600 // ===================================================================
601 // VideoController
602 // ===================================================================
603 [Version ("2.7.0"), Description (
604 "Capabilities and management of the VideoController.") ]
605 class CIM_VideoController : CIM_Controller {
606
607 [Override ("Description"),
608 MappingStrings {"MIF.DMTF|Video|004.18"} ]
609 string Description;
610 tony 1.1
611 [Description (
612 "A free-form string describing the video "
613 "processor/Controller.") ]
614 string VideoProcessor;
615
616 [Description (
617 "An integer enumeration indicating the type of video "
618 "memory."),
619 ValueMap {"1", "2", "3", "4", "5", "6", "7", "8", "9", "10",
620 "11", "12", "13"},
621 Values {"Other", "Unknown", "VRAM", "DRAM", "SRAM", "WRAM",
622 "EDO RAM", "Burst Synchronous DRAM", "Pipelined Burst SRAM",
623 //10
624 "CDRAM", "3DRAM", "SDRAM", "SGRAM"},
625 MappingStrings {"MIF.DMTF|Video|004.6"} ]
626 uint16 VideoMemoryType;
627
628 [Description (
629 "Number of video pages supported given the current "
630 "resolutions and available memory.") ]
631 tony 1.1 uint32 NumberOfVideoPages;
632
633 [Description (
634 "Maximum amount of memory supported in bytes."),
635 Units ("Bytes") ]
636 uint32 MaxMemorySupported;
637
638 [Description (
639 "An array of integers indicating the graphics and 3D "
640 "capabilities of the VideoController."),
641 ValueMap {"0", "1", "2", "3", "4", "5", "6", "7", "8"},
642 Values {"Unknown", "Other", "Graphics Accelerator",
643 "3D Accelerator", "PCI Fast Write", "MultiMonitor Support",
644 "PCI Mastering", "Second Monochrome Adapter Support",
645 "Large Memory Address Support"},
646 ModelCorrespondence {
647 "CIM_VideoController.CapabilityDescriptions"} ]
648 uint16 AcceleratorCapabilities[];
649
650 [Description (
651 "An array of free-form strings providing more detailed "
652 tony 1.1 "explanations for any of the video Accelerator features "
653 "indicated in the Capabilities array. Note, each entry of "
654 "this array is related to the entry in the Capabilities "
655 "array that is located at the same index."),
656 ArrayType ("Indexed"),
657 ModelCorrespondence {
658 "CIM_VideoController.AcceleratorCapabilities"} ]
659 string CapabilityDescriptions[];
660
661 [Description (
662 "The number of bits used to display each pixel."),
663 Units ("Bits"),
664 MappingStrings {"MIF.DMTF|Video|004.12"} ]
665 uint32 CurrentBitsPerPixel;
666
667 [Description (
668 "Current number of horizontal pixels."),
669 Units ("Pixels"),
670 MappingStrings {"MIF.DMTF|Video|004.11"} ]
671 uint32 CurrentHorizontalResolution;
672
673 tony 1.1 [Description (
674 "Current number of vertical pixels."),
675 Units ("Pixels"),
676 MappingStrings {"MIF.DMTF|Video|004.10"} ]
677 uint32 CurrentVerticalResolution;
678
679 [Description (
680 "Maximum refresh rate of the VideoController in Hertz."),
681 Units ("Hertz"),
682 MappingStrings {"MIF.DMTF|Video|004.5"} ]
683 uint32 MaxRefreshRate;
684
685 [Description (
686 "Minimum refresh rate of the Video Controller in Hertz."),
687 Units ("Hertz"),
688 MappingStrings {"MIF.DMTF|Video|004.4"} ]
689 uint32 MinRefreshRate;
690
691 [Description (
692 "Current refresh rate in Hertz."),
693 Units ("Hertz"),
694 tony 1.1 MappingStrings {"MIF.DMTF|Video|004.15"} ]
695 uint32 CurrentRefreshRate;
696
697 [Description (
698 "Current scan mode. \"Interlaced\" (value=3) or \"Non "
699 "Interlaced\" (4) can be defined using this property."),
700 ValueMap {"1", "2", "3", "4"},
701 Values {"Other", "Unknown", "Interlaced", "Non Interlaced"},
702 MappingStrings {"MIF.DMTF|Video|004.8"} ]
703 uint16 CurrentScanMode;
704
705 [Description (
706 "If in character mode, number of rows for this Video "
707 "Controller. Otherwise, enter 0."),
708 MappingStrings {"MIF.DMTF|Video|004.13"} ]
709 uint32 CurrentNumberOfRows;
710
711 [Description (
712 "If in character mode, number of columns for this "
713 "VideoController. Otherwise, enter 0."),
714 MappingStrings {"MIF.DMTF|Video|004.14"} ]
715 tony 1.1 uint32 CurrentNumberOfColumns;
716
717 [Description (
718 "Number of colors supported at the current resolutions.") ]
719 uint64 CurrentNumberOfColors;
720 };
721
722
723 // ===================================================================
724 // PCVideoController
725 // ===================================================================
726 [Version ("2.6.0"), Description (
727 "Capabilities and management of a PCVideoController, a subtype "
728 "of VideoController.") ]
729 class CIM_PCVideoController : CIM_VideoController {
730
731 [Description (
732 "The video architecture. For example, VGA (value=5) or "
733 "PC-98 (160) may be specified."),
734 ValueMap {"1", "2", "3", "4", "5", "6", "7", "8", "9", "10",
735 "11", "12", "160"},
736 tony 1.1 Values {"Other", "Unknown", "CGA", "EGA", "VGA", "SVGA", "MDA",
737 "HGC", "MCGA",
738 // 10
739 "8514A", "XGA", "Linear Frame Buffer", "PC-98"},
740 MappingStrings {"MIF.DMTF|Video|004.2"} ]
741 uint16 VideoArchitecture;
742
743 [Description (
744 "Current video mode."),
745 MappingStrings {"MIF.DMTF|Video|004.3"} ]
746 uint16 VideoMode;
747
748 [Description (
749 "Current number of color planes. If this value is not "
750 "applicable for the current video configuration, enter 0.") ]
751 uint16 NumberOfColorPlanes;
752 };
753
754
755 // ===================================================================
756 // AGPVideoController
757 tony 1.1 // ===================================================================
758 [Version ("2.7.0"), Description (
759 "Capabilities and management of an AGPVideoController.") ]
760 class CIM_AGPVideoController: CIM_VideoController {
761
762 [Deprecated {"VideoController.AcceleratorCapabilities"},
763 Description (
764 "This property has been incorporated into the inherited "
765 "AcceleratorCapabilities property. Capabilities of the AGP "
766 "Graphics Controller. For example, the Device may support "
767 "multiple monitors, PCI Mastering and large memory "
768 "addresses. In this case, the values 3, 4 and 6 would be "
769 "written to the Capabilities array."),
770 ValueMap {"0", "1", "2", "3", "4", "5", "6"},
771 Values {"Unknown", "Other", "PCI Fast Write",
772 "MultiMonitor Support", "PCI Mastering",
773 "Second Monochrome Adapter Support",
774 "Large Memory Address Support"},
775 ArrayType ("Indexed"),
776 ModelCorrespondence {
777 "CIM_AGPVideoController.CapabilityDescriptions"} ]
778 tony 1.1 uint16 Capabilities[];
779
780 [Description (
781 "Size of the non-local video memory in KB."),
782 Units ("KiloBytes") ]
783 uint32 NonlocalVideoMemorySize;
784
785 [Description (
786 "Width of the internal bus in the graphics Controller, in "
787 "bits."),
788 Units ("Bits") ]
789 uint32 LocalBusWidth;
790
791 [Description (
792 "An integer enumeration indicating the usage model of the "
793 "graphics Controller. Usage model indicates how the "
794 "Controller does manipulations of graphics surfaces, "
795 "textures, etc. in memory. DMA indicates that the graphics "
796 "Controller brings structures from the system memory to its "
797 "local memory to perform needed manipulations or "
798 "renderings. Execute specifies that the graphics Controller "
799 tony 1.1 "can directly access a specified region in main memory "
800 "(called the graphics aperture) using GART - Graphics "
801 "Aperture Remapping Table. It then performs manipulations "
802 "in that range as if that whole graphics aperture were part "
803 "of its local memory. A value of \"Both\" DMA and Execute "
804 "models may also be specified."),
805 ValueMap {"0", "1", "2", "3", "4"},
806 Values {"Unknown", "Other", "Execute", "DMA", "Both"} ]
807 uint16 UsageModel;
808
809 [Description (
810 "An integer enumeration indicating the data transfer rate of "
811 "the graphics Controller."),
812 ValueMap {"0", "1", "2", "3", "4"},
813 Values {"Unknown", "Other", "1X", "2X", "4X"} ]
814 uint16 DataTransferRate;
815
816 [Description (
817 "An integer enumeration indicating the addressing mode of "
818 "the graphics Controller."),
819 ValueMap {"0", "1", "2", "3"},
820 tony 1.1 Values {"Unknown", "Other", "Sideband", "Pipeline"} ]
821 uint16 AddressingMode;
822
823 [Description (
824 "The maximum number of AGP Transaction requests that the "
825 "master (AGP Graphics Controller) is allowed to enqueue into "
826 "the target.") ]
827 uint32 MaximumAGPCommandQueuePath;
828
829 [Description (
830 "The number of AGP Transaction that the core logic (chipset) "
831 "can accept into its transaction request queue from the "
832 "Controller.") ]
833 uint32 MaxNumberOfPipelinedAGPTransactions;
834
835 [Description (
836 "Size of the graphics aperture in KB."),
837 Units ("KiloBytes") ]
838 uint32 GraphicsApertureSize;
839
840 [Description (
841 tony 1.1 "A string containing the AGP specification version to which "
842 "this graphics Controller conforms.") ]
843 string AGPSpecificationVersionConformance;
844 };
845
846
847 // ===================================================================
848 // VideoControllerResolution
849 // ===================================================================
850 [Version ("2.6.0"), Description (
851 "VideoControllerResolution describes the various video modes "
852 "that a VideoController can support. Video modes are defined "
853 "by the possible horizontal and vertical resolutions, refresh "
854 "rate, scan mode and number of colors settings supported by a "
855 "Controller. The actual resolutions, etc. that are in use, "
856 "are the values specified in the VideoController object.") ]
857 class CIM_VideoControllerResolution : CIM_Setting {
858
859 [Key, Override ("SettingID"), Description (
860 "The inherited SettingID serves as part of the key for a "
861 "VideoControllerResolution instance."),
862 tony 1.1 MaxLen (256) ]
863 string SettingID;
864
865 [Description (
866 "Controller's horizontal resolution in Pixels."),
867 Units ("Pixels"),
868 MappingStrings {"MIF.DMTF|Monitor Resolutions|002.2"},
869 ModelCorrespondence {
870 "CIM_VideoController.CurrentHorizontalResolution"} ]
871 uint32 HorizontalResolution;
872
873 [Description (
874 "Controller's vertical resolution in Pixels."),
875 Units ("Pixels"),
876 MappingStrings {"MIF.DMTF|Monitor Resolutions|002.3"},
877 ModelCorrespondence {
878 "CIM_VideoController.CurrentVerticalResolution"} ]
879 uint32 VerticalResolution;
880
881 [Description (
882 "Refresh rate in Hertz. If a range of rates is supported, "
883 tony 1.1 "use the MinRefreshRate and MaxRefreshRate properties, and "
884 "set RefreshRate (this property) to 0."),
885 Units ("Hertz"),
886 MappingStrings {"MIF.DMTF|Monitor Resolutions|002.4"},
887 ModelCorrespondence {"CIM_VideoController.CurrentRefreshRate"} ]
888 uint32 RefreshRate;
889
890 [Description (
891 "Minimum refresh rate in Hertz, when a range of rates is "
892 "supported at the specified resolutions."),
893 Units ("Hertz"),
894 MappingStrings {"MIF.DMTF|Monitor Resolutions|002.6"},
895 ModelCorrespondence {"CIM_VideoController.MinRefreshRate"} ]
896 uint32 MinRefreshRate;
897
898 [Description (
899 "Maximum refresh rate in Hertz, when a range of rates is "
900 "supported at the specified resolutions."),
901 Units ("Hertz"),
902 MappingStrings {"MIF.DMTF|Monitor Resolutions|002.7"},
903 ModelCorrespondence {"CIM_VideoController.MaxRefreshRate"} ]
904 tony 1.1 uint32 MaxRefreshRate;
905
906 [Description (
907 "Integer indicating whether the Controller operates in "
908 "interlaced (value=5) or non-interlaced (4) mode."),
909 ValueMap {"1", "2", "3", "4", "5"},
910 Values {"Other", "Unknown", "Not Supported",
911 "Non-Interlaced Operation", "Interlaced Operation"},
912 MappingStrings {"MIF.DMTF|Monitor Resolutions|002.5"},
913 ModelCorrespondence {"CIM_VideoController.CurrentScanMode"} ]
914 uint16 ScanMode;
915
916 [Description (
917 "Number of colors supported at the current resolutions."),
918 ModelCorrespondence {
919 "CIM_VideoController.CurrentNumberOfColors"} ]
920 uint64 NumberOfColors;
921 };
922
923
924 // ===================================================================
925 tony 1.1 // VideoSetting
926 // ===================================================================
927 [Association, Version ("2.6.0"), Description (
928 "VideoSetting associates the VideoControllerResolution Setting "
929 "with the Controller(s) to which it applies.") ]
930 class CIM_VideoSetting : CIM_ElementSetting {
931
932 [Override ("Element"), Description (
933 "The VideoController.") ]
934 CIM_VideoController REF Element;
935
936 [Override ("Setting"), Description (
937 "The resolutions, refresh rates, scan mode and number of "
938 "colors that can be set for the Controller.") ]
939 CIM_VideoControllerResolution REF Setting;
940 };
941
942
943 // ===================================================================
944 // PCIController
945 // ===================================================================
946 tony 1.1 [Version ("2.6.0"), Description (
947 "PCIController is a superclass for the PCIBridge and PCIDevice "
948 "classes. These classes model adapters and bridges on a PCI "
949 "bus. The properties in PCIController and its subclasses are "
950 "defined in the various PCI Specifications published by the PCI "
951 "SIG.") ]
952 class CIM_PCIController : CIM_Controller {
953
954 [Description (
955 "Current contents of the register that provides basic "
956 "control over the device's ability to respond to, and/or "
957 "perform PCI accesses.") ]
958 uint16 CommandRegister;
959
960 [Description (
961 "An array of integers indicating controller capabilities. "
962 "Information such as \"Supports 66MHz\" (value=2) is "
963 "specified in this property. The data in the Capabilities "
964 "array is gathered from the PCI Status Register and the PCI "
965 "Capabilities List as defined in the PCI Specification."),
966 ValueMap {"0", "1", "2", "3", "4", "5", "6", "7", "8", "9",
967 tony 1.1 "10", "11", "12"},
968 Values {"Unknown", "Other", "Supports 66MHz",
969 "Supports User Definable Features",
970 "Supports Fast Back-to-Back Transactions", "PCI-X Capable",
971 "PCI Power Management Supported",
972 "Message Signaled Interrupts Supported",
973 "Parity Error Recovery Capable", "AGP Supported",
974 // 10
975 "Vital Product Data Supported", "Provides Slot Identification",
976 "Hot Swap Supported"},
977 ArrayType ("Indexed"),
978 ModelCorrespondence {
979 "CIM_PCIController.CapabilityDescriptions"} ]
980 uint16 Capabilities[];
981
982 [Description (
983 "An array of free-form strings providing more detailed "
984 "explanations for any of the PCIController features "
985 "indicated in the Capabilities array. Note, each entry of "
986 "this array is related to the entry in the Capabilities "
987 "array that is located at the same index."),
988 tony 1.1 ArrayType ("Indexed"),
989 ModelCorrespondence {"CIM_PCIController.Capabilities"} ]
990 string CapabilityDescriptions[];
991
992 [Description (
993 "The slowest device select timing for a target device."),
994 ValueMap {"0", "1", "2", "3", "4", "5"},
995 Values {"Unknown", "Other", "Fast", "Medium", "Slow",
996 "Reserved"} ]
997 uint16 DeviceSelectTiming;
998
999 [Description (
1000 "Register of 8 bits that identifies the basic function of "
1001 "the PCI device. This is only the upper byte (offset 0Bh) "
1002 "of the 3 byte ClassCode field. Note that the property's "
1003 "ValueMap array specifies the decimal representation of this "
1004 "information."),
1005 ValueMap {"0", "1", "2", "3", "4", "5", "6", "7", "8", "9",
1006 "10", "11", "12", "13", "14", "15", "16", "17", "18..254",
1007 "255"},
1008 Values {"Pre 2.0", "Mass Storage", "Network", "Display",
1009 tony 1.1 "Multimedia", "Memory", "Bridge", "Simple Communications",
1010 "Base Peripheral", "Input",
1011 // 10
1012 "Docking Station", "Processor", "Serial Bus", "Wireless",
1013 "Intelligent I/O", "Satellite Communication",
1014 "Encryption/Decryption",
1015 "Data Acquisition and Signal Processing",
1016 // 18 - 255
1017 "PCI Reserved", "Other"} ]
1018 uint8 ClassCode;
1019
1020 [Description (
1021 "Specifies the system cache line size in doubleword "
1022 "increments (e.g., a 486-based system would store the value "
1023 "04h, indicating a cache line size of four doublewords."),
1024 Units ("DoubleWords") ]
1025 uint8 CacheLineSize;
1026
1027 [Description (
1028 "Defines the minimum amount of time, in PCI clock cycles, "
1029 "that the bus master can retain ownership of the bus."),
1030 tony 1.1 Units ("PCI clock cycles") ]
1031 uint8 LatencyTimer;
1032
1033 [Description (
1034 "Defines the PCI interrupt request pin (INTA# to INTD#) to "
1035 "which a PCI functional device is connected."),
1036 ValueMap {"0", "1", "2", "3", "4", "5"},
1037 Values {"None", "INTA#", "INTB#", "INTC#", "INTD#", "Unknown"} ]
1038 uint16 InterruptPin;
1039
1040 [Description (
1041 "Doubleword Expansion ROM base memory address."),
1042 Units ("DoubleWords") ]
1043 uint32 ExpansionROMBaseAddress;
1044
1045 [Description (
1046 "Reports if the PCI device can perform the self test "
1047 "function. Returns bit 7 of the BIST register as a "
1048 "boolean.") ]
1049 boolean SelfTestEnabled;
1050
1051 tony 1.1 [Description (
1052 "Method to invoke PCI device self-test. This method sets "
1053 "bit 6 of the BIST register. The return result is the lower "
1054 "four bits of the BIST register where 0 indicates success "
1055 "and non-zero is a device dependent failure. Support for "
1056 "this method is optional in the PCI Specification.") ]
1057 uint8 BISTExecution( );
1058 };
1059
1060
1061 // ===================================================================
1062 // PCIDevice
1063 // ===================================================================
1064 [Version ("2.6.0"), Description (
1065 "Capabilities and management of a PCI device controller on an "
1066 "adapter card.") ]
1067 class CIM_PCIDevice : CIM_PCIController {
1068
1069 [Description (
1070 "Array of doubleword base memory addresses.") ]
1071 uint32 BaseAddress[6];
1072 tony 1.1
1073 [Description (
1074 "Subsystem identifier code.") ]
1075 uint16 SubsystemID;
1076
1077 [Description (
1078 "Subsystem vendor ID. ID information is reported from a "
1079 "PCIDevice via protocol-specific requests. The correct "
1080 "place in the CIM Schema for this information is in "
1081 "CIM_Physical Element (the Manufacturer property) for "
1082 "hardware, and CIM_Product (the Vendor property) if the "
1083 "information is related to Product acquisition. This data "
1084 "is also reported here since it is part of the standard "
1085 "output from the Device, and as an optimization.") ]
1086 uint16 SubsystemVendorID;
1087
1088 [Description (
1089 "Register indiating how long the master would like to retain "
1090 "PCI bus ownership whenever it initiates a transaction. A "
1091 "zero value indicates no requirement."),
1092 Units ("250 nanoseconds") ]
1093 tony 1.1 uint8 MinGrantTime;
1094
1095 [Description (
1096 "Register specifying how often the device needs access to "
1097 "the PCI bus in 250ns. A zero value indicates no "
1098 "requirement."),
1099 Units ("250 nanoseconds") ]
1100 uint8 MaxLatency;
1101 };
1102
1103
1104 // ===================================================================
1105 // PCIBridge
1106 // ===================================================================
1107 [Version ("2.6.0"), Description (
1108 "Capabilities and management of a PCI controller providing "
1109 "bridge to bridge capability.") ]
1110 class CIM_PCIBridge : CIM_PCIController {
1111
1112 [Description (
1113 "Array of doubleword base memory addresses.") ]
1114 tony 1.1 uint32 BaseAddress[2];
1115
1116 [Description (
1117 "The type of bridge. Except for \"Host\" (value=0), the "
1118 "type of bridge is PCI to <value>. For type \"Host\", the "
1119 "device is a Host to PCI bridge."),
1120 ValueMap {"0", "1", "2", "3", "4", "5", "6", "7", "8", "128"},
1121 Values {"Host", "ISA", "EISA", "Micro Channel", "PCI", "PCMCIA",
1122 "NuBus", "CardBus", "RACEway",
1123 // 128
1124 "Other"} ]
1125 uint16 BridgeType;
1126
1127 [Description (
1128 "The timeslice for the secondary interface when the bridge "
1129 "is acting as an initiator. A zero value indicates no "
1130 "requirement."),
1131 Units ("PCI clock cycles") ]
1132 uint8 SecondaryLatencyTimer;
1133
1134 [Description (
1135 tony 1.1 "The number of the highest numbered bus that exists behind "
1136 "the bridge.") ]
1137 uint8 SubordinateBusNumber;
1138
1139 [Description (
1140 "The number of the PCI bus segment to which the secondary "
1141 "interface of the bridge is connected.") ]
1142 uint8 SecondayBusNumber;
1143
1144 [Description (
1145 "The number of the PCI bus segment to which the primary "
1146 "interface of the bridge is connected.") ]
1147 uint8 PrimaryBusNumber;
1148
1149 [Description (
1150 "The contents of the Bridge's SecondaryStatusRegister. For "
1151 "more information on the contents of this register, refer to "
1152 "the PCI-to-PCI Bridge Architecture Specification.") ]
1153 uint16 SecondaryStatusRegister;
1154
1155 [Description (
1156 tony 1.1 "The slowest device select timing for a target device on the "
1157 "secondary bus."),
1158 ValueMap {"0", "1", "2", "3", "4", "5"},
1159 Values {"Unknown", "Other", "Fast", "Medium", "Slow",
1160 "Reserved"} ]
1161 uint16 SecondaryBusDeviceSelectTiming;
1162
1163 [Description (
1164 "End address of the I/O addresses supported by the bus. The "
1165 "upper four bits of this property specify the address bits, "
1166 "AD[15::12], of the I/O address. The remaining 12 bits of "
1167 "the I/O address are assumed to be all 1's.") ]
1168 uint8 IOLimit;
1169
1170 [Description (
1171 "Base address of I/O addresses supported by the bus. The "
1172 "upper four bits of this property specify the address bits, "
1173 "AD[15::12], of the I/O address. The remaining 12 bits of "
1174 "the I/O address are assumed to be 0.") ]
1175 uint8 IOBase;
1176
1177 tony 1.1 [Description (
1178 "End address of the memory supported by the bus. The upper "
1179 "twelve bits of this property specify the address bits, "
1180 "AD[31::20], of a 32-bit memory address. The remaining 20 "
1181 "bits of the address are assumed to be all 1's.") ]
1182 uint16 MemoryLimit;
1183
1184 [Description (
1185 "Base address of the memory supported by the bus. The upper "
1186 "twelve bits of this property specify the address bits, "
1187 "AD[31::20], of a 32-bit memory address. The remaining 20 "
1188 "bits of the address are assumed to be 0.") ]
1189 uint16 MemoryBase;
1190
1191 [Description (
1192 "End address of the memory that can be prefetched by the "
1193 "bus. The upper twelve bits of this property specify the "
1194 "address bits, AD[31::20], of a 32-bit memory address. The "
1195 "remaining 20 bits of the address are assumed to be all "
1196 "1's.") ]
1197 uint16 PrefetchMemoryLimit;
1198 tony 1.1
1199 [Description (
1200 "Base address of the memory that can be prefetched by the "
1201 "bus. The upper twelve bits of this property specify the "
1202 "address bits, AD[31::20], of a 32-bit memory address. The "
1203 "remaining 20 bits of the address are assumed to be 0.") ]
1204 uint16 PrefetchMemoryBase;
1205
1206 [Description (
1207 "Upper 32 bits of the supported prefetch end address when "
1208 "64-bit addressing is used. The lower 32 bits are assumed "
1209 "to be all 1's.") ]
1210 uint32 PrefetchLimitUpper32;
1211
1212 [Description (
1213 "Upper 32 bits of the supported prefetch base address when "
1214 "64-bit addressing is used. The lower 32 bits are assumed "
1215 "to be 0.") ]
1216 uint32 PrefetchBaseUpper32;
1217
1218 [Description (
1219 tony 1.1 "Upper 16 bits of the supported I/O end address when 32-bit "
1220 "I/O addressing is used. The lower 16 bits are assumed to "
1221 "be all 1's.") ]
1222 uint16 IOLimitUpper16;
1223
1224 [Description (
1225 "Upper 16 bits of the supported I/O base address when 32-bit "
1226 "I/O addressing is used. The lower 16 bits are assumed to "
1227 "be 0.") ]
1228 uint16 IOBaseUpper16;
1229 };
1230
1231
1232 // ==================================================================
1233 // PortController
1234 // ==================================================================
1235 [Experimental, Version ("2.7.1000"), Description (
1236 "PortController is a logical device corresponding to a hardware "
1237 "network port controller. Port controllers provide various "
1238 "features depending on their types and versions.") ]
1239 class CIM_PortController : CIM_Controller {
1240 tony 1.1
1241 [Description (
1242 "The type or model of the port controller. Specific values "
1243 "will be enumerated in a later release of this schema. When "
1244 "set to 1 (\"Other\"), the related property "
1245 "OtherControllerType contains a string description of the "
1246 "controller's type."),
1247 ValueMap {"0", "1", "2", "3", "4", "5", "6", "7", "8"},
1248 Values {"Unknown", "Other", "Ethernet", "IB", "FC", "FDDI",
1249 "ATM", "Token Ring", "Frame Relay"},
1250 ModelCorrespondence { "CIM_PortController.OtherControllerType"} ]
1251 uint16 ControllerType;
1252
1253 [Description (
1254 "A string value for controller types not captured by the "
1255 "ControllerType enumeration. This should only be used when "
1256 "the value of the ControllerType property is set to 1, "
1257 "\"Other\"."),
1258 ModelCorrespondence { "CIM_PortController.ControllerType"} ]
1259 string OtherControllerType;
1260
1261 tony 1.1 [Description (
1262 "The revision number of the controller.") ]
1263 uint16 ControllerVersion;
1264 };
1265
1266
1267 // ===================================================================
1268 // end of file
1269 // ===================================================================
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