1 karl 1.1 // ===================================================================
2 // Title: Device Memory 2.7
3 // Filename: Device27_Memory.mof
4 // Version: 2.7.0
5 // Release: Preliminary
6 // Date: 07/09/02
7 // ===================================================================
8 // Copyright 2002 Distributed Management Task Force, Inc. (DMTF).
9 // All rights reserved.
10 // DMTF is a not-for-profit association of industry members dedicated
11 // to promoting enterprise and systems management and interoperability.
12 // DMTF specifications and documents may be reproduced for uses
13 // consistent with this purpose by members and non-members,
14 // provided that correct attribution is given.
15 // As DMTF specifications may be revised from time to time,
16 // the particular version and release date should always be noted.
17 //
18 // Implementation of certain elements of this standard or proposed
19 // standard may be subject to third party patent rights, including
20 // provisional patent rights (herein "patent rights"). DMTF makes
21 // no representations to users of the standard as to the existence
22 karl 1.1 // of such rights, and is not responsible to recognize, disclose, or
23 // identify any or all such third party patent right, owners or
24 // claimants, nor for any incomplete or inaccurate identification or
25 // disclosure of such rights, owners or claimants. DMTF shall have no
26 // liability to any party, in any manner or circumstance, under any
27 // legal theory whatsoever, for failure to recognize, disclose, or
28 // identify any such third party patent rights, or for such party's
29 // reliance on the standard or incorporation thereof in its product,
30 // protocols or testing procedures. DMTF shall have no liability to
31 // any party implementing such standard, whether such implementation
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33 // have no liability or responsibility for costs or losses incurred if
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38 //
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43 karl 1.1 // ===================================================================
44 // Description: The Device Model extends the management concepts that
45 // are related to LogicalDevices. This file defines the
46 // concepts behind managing memory.
47 //
48 // The object classes below are listed in an order that
49 // avoids forward references. Required objects, defined
50 // by other working groups, are omitted.
51 // ==================================================================
52 // Change Log for v2.7
53 // CR622 - Fix the DMI mapping string to include the attribute number
54 // for Memory.ErrorInfo, .CorrectableError, .ErrorAccess,
55 // .ErrorTransferSize, .ErrorData, .ErrorAddress,
56 // .ErrorResolution & .AdditionalErrorData,
57 // VolatileStorage.Cacheable & .CacheType,
58 // CacheMemory.Level, .WritePolicy, .CacheType, .LineSize,
59 // .ReplacementPolicy, .ReadPolicy, .FlushTimer, &
60 // .Associativity
61 // CR771 - Add the Composition qualifer to ComputerSystemMemory
62 // ==================================================================
63
64 karl 1.1 #pragma locale ("en_US")
65
66
67 // ===================================================================
68 // Memory
69 // ===================================================================
70 [Version ("2.7.0"), Description (
71 "Capabilities and management of Memory-related LogicalDevices.") ]
72 class CIM_Memory : CIM_StorageExtent {
73
74 [Override ("ErrorMethodology"), Description (
75 "ErrorMethodology for Memory is a string property that "
76 "indicates whether parity or CRC algorithms, ECC or other "
77 "mechanisms are used. Details on the algorithm can also "
78 "be supplied."),
79 MappingStrings {"MIF.DMTF|Physical Memory Array|001.7"} ]
80 string ErrorMethodology;
81
82 [Description (
83 "The beginning address, referenced by an application or "
84 "operating system and mapped by a memory controller, for "
85 karl 1.1 "this Memory object. The starting address is specified in "
86 "KBytes."),
87 Units ("KiloBytes"),
88 MappingStrings {
89 "MIF.DMTF|Memory Array Mapped Addresses|001.3",
90 "MIF.DMTF|Memory Device Mapped Addresses|001.4"} ]
91 uint64 StartingAddress;
92
93 [Description (
94 "The ending address, referenced by an application or "
95 "operating system and mapped by a memory controller, for "
96 "this Memory object. The ending address is specified in "
97 "KBytes."),
98 Units ("KiloBytes"),
99 MappingStrings {
100 "MIF.DMTF|Memory Array Mapped Addresses|001.4",
101 "MIF.DMTF|Memory Device Mapped Addresses|001.5"} ]
102 uint64 EndingAddress;
103
104 [Description (
105 "An integer enumeration describing the type of error that "
106 karl 1.1 "occurred most recently. For example, single (value=6) or "
107 "double bit errors (7) can be specified using this property. "
108 "The values, 12-14, are undefined in the CIM Schema since in "
109 "DMI, they mix the semantics of the type of error and whether "
110 "it was correctable or not. The latter is indicated in the "
111 "property, CorrectableError."),
112 ValueMap {"1", "2", "3", "4", "5", "6", "7", "8", "9",
113 "10", "11", "12", "13", "14"},
114 Values {"Other", "Unknown", "OK", "Bad Read", "Parity Error",
115 "Single-Bit Error", "Double-Bit Error", "Multi-Bit Error",
116 "Nibble Error", "Checksum Error", "CRC Error", "Undefined",
117 "Undefined", "Undefined"},
118 MappingStrings {"MIF.DMTF|Memory Device|005.12",
119 "MIF.DMTF|Physical Memory Array|001.8"},
120 ModelCorrespondence {"CIM_Memory.OtherErrorDescription"} ]
121 uint16 ErrorInfo;
122
123 [Description (
124 "Free form string providing more information if the Error"
125 "Type property is set to 1, \"Other\". If not set to 1, this "
126 "string has no meaning."),
127 karl 1.1 ModelCorrespondence {"CIM_Memory.ErrorInfo"} ]
128 string OtherErrorDescription;
129
130 [Description (
131 "Boolean indicating that the most recent error was "
132 "correctable. If the ErrorInfo property is equal to 3, "
133 "\"OK\", then this property has no meaning."),
134 MappingStrings {"MIF.DMTF|Physical Memory Array|001.8"} ]
135 boolean CorrectableError;
136
137 [Description (
138 "The time that the last memory error occurred. The type of "
139 "error is described by the ErrorInfo property. If the Error"
140 "Info property is equal to 3, \"OK\", then this property has "
141 "no meaning.") ]
142 datetime ErrorTime;
143
144 [Description (
145 "An integer enumeration indicating the memory access "
146 "operation that caused the last error. The type of error is "
147 "described by the ErrorInfo property. If the ErrorInfo "
148 karl 1.1 "property is equal to 3, \"OK\", then this property "
149 "has no meaning."),
150 ValueMap {"1", "2", "3", "4", "5"},
151 Values {"Other", "Unknown", "Read", "Write", "Partial Write"},
152 MappingStrings {"MIF.DMTF|Physical Memory Array|001.10"} ]
153 uint16 ErrorAccess;
154
155 [Description (
156 "The size of the data transfer in bits that caused the last "
157 "error. 0 indicates no error. If the ErrorInfo property "
158 "is equal to 3, \"OK\", then this property should be set "
159 "to 0."),
160 Units ("Bits"),
161 MappingStrings {"MIF.DMTF|Physical Memory Array|001.11"} ]
162 uint32 ErrorTransferSize;
163
164 [OctetString, Description (
165 "Data captured during the last erroneous mebmory access. "
166 "The data occupies the first n octets of the array necessary "
167 "to hold the number of bits specified by the ErrorTransferSize "
168 "property. If ErrorTransferSize is 0, then this property "
169 karl 1.1 "has no meaning."),
170 ArrayType ("Indexed"),
171 MappingStrings {"MIF.DMTF|Physical Memory Array|001.12"} ]
172 uint8 ErrorData[64];
173
174 [Description (
175 "The ordering for data stored in the ErrorData property. "
176 "\"Least Significant Byte First\" (value=1) or "
177 "\"Most Significant Byte First\" (2) can be specified. If "
178 "ErrorTransferSize is 0, then this property has no meaning."),
179 ValueMap {"0", "1", "2"},
180 Values {"Unknown", "Least Significant Byte First",
181 "Most Significant Byte First"} ]
182 uint16 ErrorDataOrder;
183
184 [Description (
185 "Specifies the address of the last memory error. The type "
186 "of error is described by the ErrorInfo property. "
187 "If the ErrorInfo property is equal to 3, \"OK\", then this "
188 "property has no meaning."),
189 MappingStrings {"MIF.DMTF|Memory Device|005.19",
190 karl 1.1 "MIF.DMTF|Physical Memory Array|001.14"} ]
191 uint64 ErrorAddress;
192
193 [Description (
194 "Boolean indicating whether the address information in "
195 "the property, ErrorAddress, is a system-level address (TRUE) "
196 "or a physical address (FALSE). If the ErrorInfo property is "
197 "equal to 3, \"OK\", then this property has no meaning.") ]
198 boolean SystemLevelAddress;
199
200 [Description (
201 "Specifies the range, in bytes, to which the last error can be "
202 "resolved. For example, if error addresses are resolved to bit "
203 "11 (ie, on a typical page basis), then errors can be "
204 "resolved to 4K boundaries and this property is set to 4000. "
205 "If the ErrorInfo property is equal to 3, \"OK\", then this "
206 "property has no meaning."),
207 Units ("Bytes"),
208 MappingStrings {"MIF.DMTF|Memory Device|005.21",
209 "MIF.DMTF|Physical Memory Array|001.15"} ]
210 uint64 ErrorResolution;
211 karl 1.1
212 [OctetString, Description (
213 "An array of octets holding additional error information. "
214 "An example is ECC Syndrome or the return of the check bits "
215 "if a CRC-based ErrorMethodology is used. In the latter case, "
216 "if a single bit error is recognized and the CRC algorithm "
217 "is known, it is possible to determine the exact bit that "
218 "failed. This type of data (ECC Syndrome, Check Bit or "
219 "Parity Bit data, or other vendor supplied information) is "
220 "included in this field. If the ErrorInfo property is "
221 "equal to 3, \"OK\", then AdditionalErrorData has no meaning."),
222 MappingStrings {
223 "MIF.DMTF|Memory Device|005.18",
224 "MIF.DMTF|Physical Memory Array|001.13"} ]
225 uint8 AdditionalErrorData[64];
226 };
227
228
229 // ===================================================================
230 // AssociatedMemory
231 // ===================================================================
232 karl 1.1 [Association, Version ("2.6.0"), Description (
233 "LogicalDevices may have Memory installed on them or "
234 "otherwise associated with them - such as CacheMemory. "
235 "This is made explicit in this association.") ]
236 class CIM_AssociatedMemory : CIM_Dependency {
237
238 [Override ("Antecedent"), Description (
239 "Memory installed on or associated with a Device.") ]
240 CIM_Memory REF Antecedent;
241
242 [Override ("Dependent"), Description (
243 "The LogicalDevice.") ]
244 CIM_LogicalDevice REF Dependent;
245 };
246
247
248 // ===================================================================
249 // ComputerSystemMemory
250 // ===================================================================
251 [Association, Aggregation, Composition, Version ("2.7.0"),
252 Description (
253 karl 1.1 "Association indicating that memory is installed and required "
254 "for the UnitaryComputerSystem to operate. At least one "
255 "Memory StorageExtent is required. Note that this relationship "
256 "inherits from the SystemDevice association, and therefore, "
257 "the Memory StorageExtent is weak to the aggregating Unitary"
258 "ComputerSystem.") ]
259 class CIM_ComputerSystemMemory : CIM_SystemDevice {
260
261 [Override ("GroupComponent"), Aggregate,
262 Description ("The UnitaryComputerSystem.") ]
263 CIM_UnitaryComputerSystem REF GroupComponent;
264
265 [Override ("PartComponent"), Description (
266 "The Memory StorageExtent which is part of the "
267 "UnitaryComputerSystem.") ]
268 CIM_Memory REF PartComponent;
269 };
270
271
272 // ===================================================================
273 // AssociatedProcessorMemory
274 karl 1.1 // ===================================================================
275 [Association, Version ("2.6.0"), Description (
276 "Associates the Processor and system Memory, or a Processor's "
277 "Cache. ") ]
278 class CIM_AssociatedProcessorMemory : CIM_AssociatedMemory {
279
280 [Override ("Dependent"), Description (
281 "The Processor that accesses the Memory or uses the Cache.") ]
282 CIM_Processor REF Dependent;
283
284 [Description (
285 "Speed of the bus, in MHertz, between the Processor and "
286 "Memory. "),
287 Units ("MegaHertz") ]
288 uint32 BusSpeed;
289 };
290
291
292 // ===================================================================
293 // NonVolatileStorage
294 // ===================================================================
295 karl 1.1 [Version ("2.7.0"), Description (
296 "Capabilities and management of NV Storage. Non-volatile memory "
297 "natively includes flash and ROM storage. In addition, NV memory "
298 "can be BasedOn VolatileStorage, if the volatile memory is backed "
299 "by a Battery. This scenario would be completely described by an "
300 "instance of the AssociatedBattery relationship, referencing the "
301 "NonVolatileStorage as the Dependent and the Battery as the "
302 "Antecedent, and an instance of the BasedOn relationship, "
303 "referencing the NonVolatileStorage as the Dependent and the "
304 "VolatileStorage as the Antecedent.") ]
305 class CIM_NonVolatileStorage : CIM_Memory {
306
307 [Description (
308 "Indicating that the NV storage is writeable.") ]
309 boolean IsWriteable;
310
311 [Description (
312 "Boolean indicating that at least some portion of the "
313 "NonVolatileStorage is writeable by applications.") ]
314 boolean ApplicationWriteable;
315
316 karl 1.1 [Description (
317 "When at least some portion of the NonVolatileStorage is "
318 "writeable (ApplicationWriteable property = TRUE), StartAddress"
319 "forApplcationWrite indicates the starting address for "
320 "application data. If the ApplicationWriteable property is "
321 "FALSE, this property is undefined."),
322 ModelCorrespondence {
323 "CIM_NonVolatileStorage.ApplicationWriteable"} ]
324 uint64 StartAddressForApplicationWrite;
325
326 [Description (
327 "When at least some portion of the NonVolatileStorage is "
328 "writeable (ApplicationWriteable property = TRUE), Application"
329 "WritableSize indicates the number of bits available for "
330 "application data. If the ApplicationWriteable property is "
331 "FALSE, this property is undefined."),
332 Units ("Bits"),
333 ModelCorrespondence {
334 "CIM_NonVolatileStorage.ApplicationWriteable"} ]
335 uint64 ApplicationWriteableSize;
336 };
337 karl 1.1
338
339 // ===================================================================
340 // BIOSLoadedInNV
341 // ===================================================================
342 [Association, Version ("2.6.0"), Description (
343 "A link between BIOSElement and NonVolatileStorage where "
344 "the BIOS is loaded.") ]
345 class CIM_BIOSLoadedInNV : CIM_Dependency {
346
347 [Override ("Antecedent"), Description (
348 "The non-volatile storage.") ]
349 CIM_NonVolatileStorage REF Antecedent;
350
351 [Override ("Dependent"), Description (
352 "The BIOS stored in the NonVolatile Extent.") ]
353 CIM_BIOSElement REF Dependent;
354
355 [Description (
356 "The starting address where the BIOS is located in "
357 "non-volatile storage.") ]
358 karl 1.1 uint64 StartingAddress;
359
360 [Description (
361 "The ending address where the BIOS is located in "
362 "non-volatile storage.") ]
363 uint64 EndingAddress;
364 };
365
366
367 // ===================================================================
368 // VolatileStorage
369 // ===================================================================
370 [Version ("2.6.0"), Description (
371 "Capabilities and management of Volatile Storage.") ]
372 class CIM_VolatileStorage : CIM_Memory {
373
374 [Description (
375 "Indicates whether this Memory can be cached or not."),
376 MappingStrings {"MIF.DMTF|System Resource Memory Info|002.5"} ]
377 boolean Cacheable;
378
379 karl 1.1 [Description (
380 "An enumeration indicating the cache type that is "
381 "compatible with this Memory. For example, 4 indicates "
382 "write-through cache. If the Cacheable property is "
383 "set to false, then this property does not have meaning and "
384 "should be set to 5, \"Not Applicable\"."),
385 ValueMap {"1", "2", "3", "4", "5"},
386 Values {"Other", "Unknown", "Write-Back", "Write-Through",
387 "Not Applicable"},
388 MappingStrings {"MIF.DMTF|System Resource Memory Info|002.6"} ]
389 uint16 CacheType;
390 };
391
392
393 // ===================================================================
394 // CacheMemory
395 // ===================================================================
396 [Version ("2.7.0"), Description (
397 "Capabilities and management of Cache Memory. Cache memory is "
398 "dedicated or allocated RAM that a Processor searches first "
399 "for data, before going to 'regular' memory. CacheMemory is "
400 karl 1.1 "used to speed up the delivery of data to a Processor. It is "
401 "usually described by its closeness to the Processor (for "
402 "example, Primary or Secondary Cache). \n"
403 "If a DiskDrive includes RAM allocated for holding the disk's "
404 "most recently read and/or adjacent data (in order to speed "
405 "up retrieval), this also would be modeled as CacheMemory. "
406 "Note that CacheMemory is NOT operating system or application "
407 "level buffers but actual RAM allocated for caching data for "
408 "a Processor, from a hard disk, etc.") ]
409 class CIM_CacheMemory : CIM_Memory {
410
411 [Description (
412 "Defines whether this is the Primary (value=3), Secondary "
413 "(value=4) or Tertiary (value=5) Cache. Also, \"Other\" (1), "
414 "\"Unknown\" (2) and \"Not Applicable\" (6) can be defined."),
415 ValueMap {"1", "2", "3", "4", "5", "6"},
416 Values {"Other", "Unknown", "Primary", "Secondary", "Tertiary",
417 "Not Applicable"},
418 MappingStrings {"MIF.DMTF|System Cache|006.2"} ]
419 uint16 Level;
420
421 karl 1.1 [Description (
422 "Defines whether this is write-back (value=3) or write-through "
423 "(value=4) Cache, or whether this information \"Varies with "
424 "Address\" (5) or is defined individually for each I/O (6). "
425 "Also, \"Other\" (1) and \"Unknown\" (2) can be specified."),
426 ValueMap {"1", "2", "3", "4", "5", "6"},
427 Values {"Other", "Unknown", "Write Back", "Write Through",
428 "Varies with Address", "Determination Per I/O"},
429 MappingStrings {"MIF.DMTF|System Cache|006.5"} ]
430 uint16 WritePolicy;
431
432 [Description (
433 "Defines whether this is for instruction caching (value=3), "
434 "data caching (value=4) or both (value=5, \"Unified\"). "
435 "Also, \"Other\" (1) and \"Unknown\" (2) can be defined."),
436 ValueMap {"1", "2", "3", "4", "5"},
437 Values {"Other", "Unknown", "Instruction", "Data", "Unified"},
438 MappingStrings {"MIF.DMTF|System Cache|006.9"} ]
439 uint16 CacheType;
440
441 [Description (
442 karl 1.1 "Size, in bytes, of a single cache bucket or line."),
443 Units ("Bytes"),
444 MappingStrings {"MIF.DMTF|System Cache|006.10"} ]
445 uint32 LineSize;
446
447 [Description (
448 "An integer enumeration describing the algorithm to "
449 "determine which cache lines or buckets should be re-used."),
450 ValueMap {"1", "2", "3", "4", "5", "6", "7", "8"},
451 Values {"Other", "Unknown", "Least Recently Used (LRU)",
452 "First In First Out (FIFO)", "Last In First Out (LIFO)",
453 "Least Frequently Used (LFU)",
454 "Most Frequently Used (MFU)",
455 "Data Dependent Multiple Algorithms"},
456 MappingStrings {"MIF.DMTF|System Cache|006.12"} ]
457 uint16 ReplacementPolicy;
458
459 [Description (
460 "Policy that shall be employed by the Cache for handling "
461 "read requests. For example, \"Read\", \"Read-Ahead\" or "
462 "both can be specified using the values, 3, 4 or 5, "
463 karl 1.1 "respectively. If the read policy is determined individually "
464 "(ie, for each request), then the value 6 (\"Determination "
465 "per I/O\") should be specified. \"Other\" (1) and "
466 "\"Unknown\" (2) are also valid values."),
467 ValueMap {"1", "2", "3", "4", "5", "6"},
468 Values {"Other", "Unknown", "Read", "Read-Ahead",
469 "Read and Read-Ahead", "Determination Per I/O"},
470 MappingStrings {"MIF.DMTF|System Cache|006.13"} ]
471 uint16 ReadPolicy;
472
473 [Description (
474 "Maximum amount of time, in seconds, dirty lines or "
475 "buckets may remain in the Cache before they are flushed. "
476 "A value of zero indicated that a cache flush is not "
477 "controlled by a flushing timer."),
478 Units ("Seconds"),
479 MappingStrings {"MIF.DMTF|System Cache|006.14"} ]
480 uint32 FlushTimer;
481
482 [Description (
483 "An integer enumeration defining the system cache "
484 karl 1.1 "associativity. For example, 6 indicates a fully associative "
485 "cache."),
486 ValueMap {"1", "2", "3", "4", "5", "6", "7", "8"},
487 Values {"Other", "Unknown", "Direct Mapped",
488 "2-way Set-Associative",
489 "4-way Set-Associative", "Fully Associative",
490 "8-way Set-Associative", "16-way Set-Associative"},
491 MappingStrings {"MIF.DMTF|System Cache|006.15"} ]
492 uint16 Associativity;
493 };
494
495
496 // ===================================================================
497 // end of file
498 // ===================================================================
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