1 tony 1.1 // ===================================================================
2 // Title: Device Controller 2.8
3 // Filename: Device28_Contoller.mof
4 // Version: 2.8
5 // Status: Final
6 // Date: Jan 26, 2004
7 // ===================================================================
8 // Copyright 1998-2003 Distributed Management Task Force, Inc. (DMTF).
9 // All rights reserved.
10 // DMTF is a not-for-profit association of industry members dedicated
11 // to promoting enterprise and systems management and interoperability.
12 // DMTF specifications and documents may be reproduced for uses
13 // consistent with this purpose by members and non-members,
14 // provided that correct attribution is given.
15 // As DMTF specifications may be revised from time to time,
16 // the particular version and release date should always be noted.
17 //
18 // Implementation of certain elements of this standard or proposed
19 // standard may be subject to third party patent rights, including
20 // provisional patent rights (herein "patent rights"). DMTF makes
21 // no representations to users of the standard as to the existence
22 tony 1.1 // of such rights, and is not responsible to recognize, disclose, or
23 // identify any or all such third party patent right, owners or
24 // claimants, nor for any incomplete or inaccurate identification or
25 // disclosure of such rights, owners or claimants. DMTF shall have no
26 // liability to any party, in any manner or circumstance, under any
27 // legal theory whatsoever, for failure to recognize, disclose, or
28 // identify any such third party patent rights, or for such party's
29 // reliance on the standard or incorporation thereof in its product,
30 // protocols or testing procedures. DMTF shall have no liability to
31 // any party implementing such standard, whether such implementation
32 // is foreseeable or not, nor to any patent owner or claimant, and shall
33 // have no liability or responsibility for costs or losses incurred if
34 // a standard is withdrawn or modified after publication, and shall be
35 // indemnified and held harmless by any party implementing the
36 // standard from any and all claims of infringement by a patent owner
37 // for such implementations.
38 //
39 // For information about patents held by third-parties which have
40 // notified the DMTF that, in their opinion, such patent may relate to
41 // or impact implementations of DMTF standards, visit
42 // http://www.dmtf.org/about/policies/disclosures.php.
43 tony 1.1 // ===================================================================
44 // Description: The Device Model extends the management concepts that
45 // are related to LogicalDevices. This file defines
46 // the concepts and classes for Controllers.
47 //
48 // The object classes below are listed in an order that
49 // avoids forward references. Required objects, defined
50 // by other working groups, are omitted.
51 // ==================================================================
52 // Change Log for v2.8 Final
53 // CR1202 - Remove Experimental Qualifier
54 // CR1233 - SysDev omnibus CR - Minor MOF corrections
55 //
56 // CR1071 - Reintroduce PortController and SCSILun.
57 // CR885 - Add Serial ATA to Controller.protocolssupported
58 // CR1015 - ProtocolController:
59 // - Change descriptions for controller,controlledby
60 // - deprecate scsicontroller,scsiinterface
61 // - remove SCSILun
62 //
63 // Change Log for v2.7 Final
64 tony 1.1 // CR934 - Remove Controller.PortNumber
65 // CR971 - Remove PortController and SCSILUN, so they can remain
66 // experimental in 2.8.
67 //
68 // Change Log for v2.7
69 // CR622 - Fix the DMI mapping string to include the attribute number
70 // for Controller.ProtocolSupported, .MaxNumberControlled, &
71 // .ProtocolDescription,
72 // SCSIController.MaxDataWidth & .MaxTransferRate,
73 // SCSIInterface.InitiatorId, .TargetId & .SCSISignal
74 // CR632 - Add PortController
75 // CR654 - Update the description for Controller
76 // - Add Controller.PortNumber
77 // - Update the Description for ControlledBy
78 // - Add ControlledBy.DeviceNumber
79 // - Add SCSILUN
80 // CR830 - Update the Description for ControlledBy
81 // - Modify type of ControlledBy.DeviceNumber from uint64 to
82 // a string
83 // - Add ControlledBy.AccessMode and ControlledBy.AccessPriority
84 // - Update SCSILUN.DeviceNumber to match change to ContolledBy
85 tony 1.1 // CR892 - Fix the subclassing inconsistency of VideoController
86 // ==================================================================
87
88 #pragma locale ("en_US")
89
90
91 // ===================================================================
92 // Controller
93 // ===================================================================
94 [Abstract, Version ( "2.8.0" ), Description (
95 "Controller is a superclass for grouping the miscellaneous "
96 "control-related Devices that provide a 'classic' bus master "
97 "interface. Examples of Controllers are USBControllers, "
98 "SerialControllers, etc. The Controller class is an abstraction "
99 "for Devices with a single protocol stack, which exist to "
100 "control communications (data, control, and reset) to "
101 "'downstream' devices. Note that a new abstract class "
102 "(ProtocolController) has been created to model more complex "
103 "interface controllers such as SCSI.")]
104 class CIM_Controller : CIM_LogicalDevice {
105
106 tony 1.1 [Description (
107 "Time of last reset of the Controller.")]
108 datetime TimeOfLastReset;
109
110 [Description (
111 "The protocol used by the Controller to access 'controlled' "
112 "Devices."),
113 ValueMap { "1", "2", "3", "4", "5", "6", "7", "8", "9", "10",
114 "11", "12", "13", "14", "15", "16", "17", "18", "19", "20",
115 "21", "22", "23", "24", "25", "26", "27", "28", "29", "30",
116 "31", "32", "33", "34", "35", "36", "37", "38", "39", "40",
117 "41", "42", "43", "44", "45", "46", "47", "48" },
118 Values { "Other", "Unknown", "EISA", "ISA", "PCI", "ATA/ATAPI",
119 "Flexible Diskette", "1496", "SCSI Parallel Interface",
120 // 10
121 "SCSI Fibre Channel Protocol", "SCSI Serial Bus Protocol",
122 "SCSI Serial Bus Protocol-2 (1394)",
123 "SCSI Serial Storage Architecture", "VESA", "PCMCIA",
124 "Universal Serial Bus", "Parallel Protocol", "ESCON",
125 "Diagnostic",
126 // 20
127 tony 1.1 "I2C", "Power", "HIPPI", "MultiBus", "VME", "IPI",
128 "IEEE-488", "RS232", "IEEE 802.3 10BASE5",
129 "IEEE 802.3 10BASE2",
130 // 30
131 "IEEE 802.3 1BASE5", "IEEE 802.3 10BROAD36",
132 "IEEE 802.3 100BASEVG", "IEEE 802.5 Token-Ring",
133 "ANSI X3T9.5 FDDI", "MCA", "ESDI", "IDE", "CMD", "ST506",
134 // 40
135 "DSSI", "QIC2", "Enhanced ATA/IDE", "AGP",
136 "TWIRP (two-way infrared)", "FIR (fast infrared)",
137 "SIR (serial infrared)", "IrBus", "Serial ATA" },
138 MappingStrings { "MIF.DMTF|Bus Port|004.2",
139 "MIF.DMTF|Disks|003.3" },
140 ModelCorrespondence { "CIM_Controller.ProtocolDescription" }]
141 uint16 ProtocolSupported;
142
143 [Description (
144 "Maximum number of directly addressable entities supported "
145 "by this Controller. A value of 0 should be used if the "
146 "number is unknown or unlimited."),
147 MappingStrings { "MIF.DMTF|Bus Port|004.9" }]
148 tony 1.1 uint32 MaxNumberControlled;
149
150 [Description (
151 "A free form string providing more information related to "
152 "the ProtocolSupported by the Controller."),
153 MappingStrings { "MIF.DMTF|Bus Port|004.3" },
154 ModelCorrespondence { "CIM_Controller.ProtocolSupported" }]
155 string ProtocolDescription;
156 };
157
158
159 // ===================================================================
160 // ControlledBy
161 // ===================================================================
162 [Association, Version ( "2.8.0" ), Description (
163 "The ControlledBy relationship indicates which Devices are "
164 "controlled by a CIM_Controller.")]
165 class CIM_ControlledBy : CIM_DeviceConnection {
166
167 [Override ( "Antecedent" ), Description (
168 "The Controller.")]
169 tony 1.1 CIM_Controller REF Antecedent;
170
171 [Override ( "Dependent" ), Description (
172 "The controlled Device.")]
173 CIM_LogicalDevice REF Dependent;
174
175 [Description (
176 "The State property indicates whether the Controller is "
177 "actively commanding or accessing the Device (value=1) or "
178 "not (value=2). Also, the value, \"Unknown\" (0), can be "
179 "defined. This information is necessary when a LogicalDevice "
180 "can be commanded by, or accessed through, multiple "
181 "Controllers."),
182 ValueMap { "0", "1", "2" },
183 Values { "Unknown", "Active", "Inactive" }]
184 uint16 AccessState;
185
186 [Description (
187 "The time that the downstream Device was last reset by the "
188 "Controller.")]
189 datetime TimeOfDeviceReset;
190 tony 1.1
191 [Description (
192 "Number of hard resets issued by the Controller. A hard "
193 "reset returns the Device to its initialization or 'boot-up' "
194 "state. All internal Device state information and data are "
195 "lost."),
196 Counter]
197 uint32 NumberOfHardResets;
198
199 [Description (
200 "Number of soft resets issued by the Controller. A soft "
201 "reset does not completely clear current Device state and/or "
202 "data. Exact semantics are dependent on the Device, and on "
203 "the protocols and mechanisms used to communicate to it."),
204 Counter]
205 uint32 NumberOfSoftResets;
206
207 [Description (
208 "Address of associated Device in context of the antecedent "
209 "Controller.")]
210 string DeviceNumber;
211 tony 1.1
212 [Description (
213 "This property describes the accessibility of the device "
214 "thru the antedecent controller."),
215 ValueMap { "2", "3", "4" },
216 Values { "ReadWrite", "ReadOnly", "NoAccess" }]
217 uint16 AccessMode;
218
219 [Description (
220 "The property describes the priority given to accesses of "
221 "the device thru this controller. The highest priority path "
222 "will have the lowest value for this parameter.")]
223 uint16 AccessPriority;
224 };
225
226
227 // ===================================================================
228 // ESCONController
229 // ===================================================================
230 [Version ( "2.6.0" ), Description (
231 "Capabilities and management of an ESCONController.")]
232 tony 1.1 class CIM_ESCONController : CIM_Controller {
233 };
234
235
236 // ===================================================================
237 // IDEController
238 // ===================================================================
239 [Version ( "2.6.0" ), Description (
240 "Capabilities and management of an IDEController.")]
241 class CIM_IDEController : CIM_Controller {
242 };
243
244
245 // ===================================================================
246 // InfraredController
247 // ===================================================================
248 [Version ( "2.6.0" ), Description (
249 "Capabilities and management of an InfraredController.")]
250 class CIM_InfraredController : CIM_Controller {
251 };
252
253 tony 1.1
254 // ===================================================================
255 // ManagementController
256 // ===================================================================
257 [Version ( "2.6.0" ), Description (
258 "Capabilities and managment of a ManagementController. An I2C "
259 "microcontroller is a type of ManagementController.")]
260 class CIM_ManagementController : CIM_Controller {
261 };
262
263
264 // ===================================================================
265 // ParallelController
266 // ===================================================================
267 [Version ( "2.6.0" ), Description (
268 "Capabilities and management of the ParallelController.")]
269 class CIM_ParallelController : CIM_Controller {
270
271 [Description (
272 "Set to true if the ParallelController supports DMA."),
273 MappingStrings { "MIF.DMTF|Parallel Ports|003.7" }]
274 tony 1.1 boolean DMASupport;
275
276 [Description (
277 "An integer enumeration indicating the capabilities of the "
278 "ParallelController."),
279 ValueMap { "0", "1", "2", "3", "4", "5", "6", "7", "8" },
280 Values { "Unknown", "Other", "XT/AT Compatible",
281 "PS/2 Compatible", "ECP", "EPP", "PC-98", "PC-98-Hireso",
282 "PC-H98" },
283 MappingStrings { "MIF.DMTF|Parallel Ports|003.8" },
284 ArrayType ( "Indexed" ),
285 ModelCorrespondence {
286 "CIM_ParallelController.CapabilityDescriptions" }]
287 uint16 Capabilities[];
288
289 [Description (
290 "An array of free-form strings providing more detailed "
291 "explanations for any of the ParallelController features "
292 "indicated in the Capabilities array. Note, each entry of "
293 "this array is related to the entry in the Capabilities "
294 "array that is located at the same index."),
295 tony 1.1 ArrayType ( "Indexed" ),
296 ModelCorrespondence { "CIM_ParallelController.Capabilities" }]
297 string CapabilityDescriptions[];
298
299 [Description (
300 "An enumeration indicating the operational security for the "
301 "Controller. For example, information that the Device's "
302 "external interface is locked out (value=4) or \"Boot "
303 "Bypass\" (value=6) can be described using this property."),
304 ValueMap { "1", "2", "3", "4", "5", "6" },
305 Values { "Other", "Unknown", "None",
306 "External Interface Locked Out",
307 "External Interface Enabled", "Boot Bypass" },
308 MappingStrings { "MIF.DMTF|Parallel Ports|003.10" }]
309 uint16 Security;
310 };
311
312
313 // ===================================================================
314 // PCMCIAController
315 // ===================================================================
316 tony 1.1 [Version ( "2.6.0" ), Description (
317 "Capabilities and management of a PCMCIAController.")]
318 class CIM_PCMCIAController : CIM_Controller {
319 };
320
321
322 // ===================================================================
323 // SCSIController
324 // ===================================================================
325 [Deprecated { "CIM_SCSIProtocolController" }, Version ( "2.8.0" ),
326 Description (
327 "The use of this class is deprecated in lieu of "
328 "SCSIProtocolController. The latter reflects the protocol- "
329 "related issues of SCSI interfaces, since these are not bus "
330 "master-type Controllers. Capabilities and management of the "
331 "SCSIController.")]
332 class CIM_SCSIController : CIM_Controller {
333
334 [Deprecated { "No Value" }, Description (
335 "An integer enumeration indicating whether or not the "
336 "SCSIController provides redundancy or protection against "
337 tony 1.1 "device failures."),
338 ValueMap { "1", "2", "3", "4", "5", "6" },
339 Values { "Other", "Unknown", "Unprotected", "Protected",
340 "Protected through SCC (SCSI-3 Controller Command)",
341 "Protected through SCC-2 (SCSI-3 Controller Command)" },
342 MappingStrings { "MIF.DMTF|Storage Controller|001.3" }]
343 uint16 ProtectionManagement;
344
345 [Deprecated { "No Value" }, Description (
346 "Maximum data width (in bits) supported by the SCSI "
347 "Controller."),
348 Units ( "Bits" ),
349 MappingStrings { "MIF.DMTF|Bus Port|004.7" }]
350 uint32 MaxDataWidth;
351
352 [Deprecated { "No Value" }, Description (
353 "Maximum transfer rate (in Bits per Second) supported by the "
354 "SCSIController."),
355 Units ( "Bits per Second" ),
356 MappingStrings { "MIF.DMTF|Bus Port|004.8" }]
357 uint64 MaxTransferRate;
358 tony 1.1
359 [Deprecated { "No Value" }, Description (
360 "Number of SCSIController timeouts that have occurred since "
361 "the TimeOfLastReset."),
362 Counter]
363 uint32 ControllerTimeouts;
364
365 [Deprecated { "No Value" }, Description (
366 "Signal capabilities that can be supported by the SCSI "
367 "Controller. For example, the Controller may support "
368 "\"Single Ended\" and \"Differential\". In this case, the "
369 "values 3 and 4 would be written to the Signal Capabilities "
370 "array."),
371 ValueMap { "1", "2", "3", "4", "5", "6" },
372 Values { "Other", "Unknown", "Single Ended", "Differential",
373 "Low Voltage Differential", "Optical" },
374 ModelCorrespondence { "CIM_SCSIInterface.SCSISignal" }]
375 uint16 SignalCapabilities[];
376 };
377
378 // ===================================================================
379 tony 1.1 // SCSIInterface
380 // ===================================================================
381 [Association, Deprecated { "CIM_ProtocolControllerAccessesUnit" },
382 Version ( "2.8.0" ), Description (
383 "The use of this class is deprecated in lieu of "
384 "ProtocolControllerForUnit, since the SCSIController class "
385 "involved in this association is itself deprecated. The "
386 "protocol-related aspects of SCSI are better reflected in the "
387 "new classes and associations. SCSIInterface is a ControlledBy "
388 "relationship indicating which Devices are accessed through a "
389 "SCSIController and the characteristics of this access.")]
390 class CIM_SCSIInterface : CIM_ControlledBy {
391
392 [Deprecated { "No Value" }, Override ( "Antecedent" ),
393 Description (
394 "The SCSIController.")]
395 CIM_SCSIController REF Antecedent;
396
397 [Deprecated { "No Value" }, Description (
398 "Number of SCSI timeouts that have occurred since last hard "
399 "or soft reset related to the controlled Device. The time of "
400 tony 1.1 "last reset is indicated in the TimeOfDeviceReset property, "
401 "inherited from the ControlledBy association."),
402 Counter]
403 uint32 SCSITimeouts;
404
405 [Deprecated { "No Value" }, Description (
406 "Number of SCSI retries that have occurred since last hard "
407 "or soft reset related to the controlled Device. The time of "
408 "last reset is indicated in the TimeOfDeviceReset property, "
409 "inherited from the ControlledBy association."),
410 Counter,
411 MappingStrings { "MIF.DMTF|Mass Storage Statistics|001.18" }]
412 uint32 SCSIRetries;
413
414 [Deprecated { "No Value" }, Description (
415 "The SCSI Initiator ID."),
416 MappingStrings { "MIF.DMTF|Bus Port|004.5" }]
417 uint32 InitiatorId;
418
419 [Deprecated {
420 "CIM_ProtocolControllerAccessesUnit.TargetControllerNumber" },
421 tony 1.1 Description (
422 "The SCSI Target ID."),
423 MappingStrings { "MIF.DMTF|Bus Port|004.5" }]
424 uint32 TargetId;
425
426 [Deprecated { "CIM_ProtocolControllerForDevice.DeviceNumber" },
427 Description (
428 "The SCSI Target LUN."),
429 MappingStrings { "MIF.DMTF|Storage Devices|001.4" }]
430 uint64 TargetLUN;
431
432 [Deprecated { "No Value" }, Description (
433 "SCSIReservation indicates the type of SCSI reservation that "
434 "currently exists between the source and destination."),
435 ValueMap { "0", "1", "2", "3" },
436 Values { "Unknown", "None", "Simple", "Persistent" }]
437 uint16 SCSIReservation;
438
439 [Deprecated { "No Value" }, Description (
440 "The SCSI signal characteristics being used for this "
441 "connection. The value listed here must also be listed in "
442 tony 1.1 "the SCSIController's SignalCapabilities field."),
443 ValueMap { "1", "2", "3", "4", "5", "6" },
444 Values { "Other", "Unknown", "Single Ended", "Differential",
445 "Low Voltage Differential", "Optical" },
446 MappingStrings { "MIF.DMTF|Bus Port|004.4" },
447 ModelCorrespondence { "CIM_SCSIController.SignalCapabilities" }]
448 uint16 SCSISignal;
449
450 [Deprecated { "No Value" }, Description (
451 "Maximum number of Command Descriptor Blocks (CDBs) that can "
452 "be supported by the target. This data can not be obtained "
453 "under all circumstances.")]
454 uint32 MaxQueueDepth;
455
456 [Deprecated { "No Value" }, Description (
457 "The maximum number of concurrent Command Descriptor Blocks "
458 "(CDBs) that the initiator will send to the target. This "
459 "value should never be greater than MaxQueueDepth.")]
460 uint32 QueueDepthLimit;
461 };
462
463 tony 1.1 // ===================================================================
464 // SerialController
465 // ===================================================================
466 [Version ( "2.6.0" ), Description (
467 "Capabilities and management of the SerialController.")]
468 class CIM_SerialController : CIM_Controller {
469
470 [Description (
471 "The Capabilities property defines chip level compatibility "
472 "for the SerialController. Therefore, this property "
473 "describes the buffering and other capabilities of the "
474 "SerialController, that may be inherent in the chip "
475 "hardware. The property is an enumerated integer."),
476 ValueMap { "1", "2", "3", "4", "5", "6", "160", "161" },
477 Values { "Other", "Unknown", "XT/AT Compatible",
478 "16450 Compatible", "16550 Compatible", "16550A Compatible",
479 // 160
480 "8251 Compatible", "8251FIFO Compatible" },
481 MappingStrings { "MIF.DMTF|Serial Ports|004.7" },
482 ArrayType ( "Indexed" ),
483 ModelCorrespondence {
484 tony 1.1 "CIM_SerialController.CapabilityDescriptions" }]
485 uint16 Capabilities[];
486
487 [Description (
488 "An array of free-form strings providing more detailed "
489 "explanations for any of the SerialController features "
490 "indicated in the Capabilities array. Note, each entry of "
491 "this array is related to the entry in the Capabilities "
492 "array that is located at the same index."),
493 ArrayType ( "Indexed" ),
494 ModelCorrespondence { "CIM_SerialController.Capabilities" }]
495 string CapabilityDescriptions[];
496
497 [Description (
498 "Maximum baud rate in Bits per Second supported by the "
499 "SerialController."),
500 Units ( "Bits per Second" ),
501 MappingStrings { "MIF.DMTF|Serial Ports|004.6" }]
502 uint32 MaxBaudRate;
503
504 [Description (
505 tony 1.1 "An enumeration indicating the operational security for the "
506 "Controller. For example, information that the Device's "
507 "external interface is locked out (value=4) or \"Boot "
508 "Bypass\" (value=6) can be described using this property."),
509 ValueMap { "1", "2", "3", "4", "5", "6" },
510 Values { "Other", "Unknown", "None",
511 "External Interface Locked Out",
512 "External Interface Enabled", "Boot Bypass" },
513 MappingStrings { "MIF.DMTF|Serial Ports|004.9" }]
514 uint16 Security;
515 };
516
517
518 // ===================================================================
519 // SerialInterface
520 // ===================================================================
521 [Association, Version ( "2.6.0" ), Description (
522 "SerialInterface is a ControlledBy relationship indicating "
523 "which Devices are accessed through the SerialController and "
524 "the characteristics of this access.")]
525 class CIM_SerialInterface : CIM_ControlledBy {
526 tony 1.1
527 [Override ( "Antecedent" ), Description (
528 "The SerialController.")]
529 CIM_SerialController REF Antecedent;
530
531 [Override ( "NegotiatedDataWidth" ), Description (
532 "For the SerialInterface, NegotiatedDataWidth is the number "
533 "of data bits to be transmitted, without stop bits or "
534 "parity."),
535 Units ( "Bits" )]
536 uint32 NegotiatedDataWidth;
537
538 [Description (
539 "Number of stop bits to be transmitted."),
540 Units ( "Bits" )]
541 uint16 NumberOfStopBits;
542
543 [Description (
544 "Information on the parity setting for transmitted data. No "
545 "parity (value=1), even (2) or odd (3) can be specified."),
546 ValueMap { "0", "1", "2", "3" },
547 tony 1.1 Values { "Unknown", "None", "Even", "Odd" }]
548 uint16 ParityInfo;
549
550 [Description (
551 "An integer enumeration indicating the flow control "
552 "(Xon-Xoff and/or RTS/CTS) for transmitted data."),
553 ValueMap { "0", "1", "2", "3", "4", "5" },
554 Values { "Unknown", "Not Supported", "None", "XonXoff",
555 "RTS/CTS", "Both XonXoff and RTS/CTS" }]
556 uint16 FlowControlInfo;
557 };
558
559
560 // ===================================================================
561 // SSAController
562 // ===================================================================
563 [Version ( "2.6.0" ), Description (
564 "Capabilities and management of an SSAController (Serial "
565 "Storage Architecture).")]
566 class CIM_SSAController : CIM_Controller {
567 };
568 tony 1.1
569
570 // ===================================================================
571 // USBController
572 // ===================================================================
573 [Version ( "2.6.0" ), Description (
574 "Capabilities and managment of a USB Host Controller.")]
575 class CIM_USBController : CIM_Controller {
576
577 [Description (
578 "Indicates the latest USB Version supported by the "
579 "Controller. The property is expressed as a Binary-Coded "
580 "Decimal (BCD) where a decimal point is implied between the "
581 "2nd and 3rd digits. For example, a value of 0x201 indicates "
582 "that version 2.01 is supported.")]
583 uint16 USBVersion;
584
585 [Description (
586 "The type of interface used between the host system software "
587 "and the USBController."),
588 ValueMap { "0", "1", "2", "3" },
589 tony 1.1 Values { "Unknown", "Other", "UHCI", "OHCI" },
590 ModelCorrespondence { "CIM_USBController.ControllerVersion" }]
591 uint16 InterfaceType;
592
593 [Description (
594 "Indicates the version of the USB Host Controller register "
595 "set, specific to the InterfaceType. The property is "
596 "expressed as a Binary-Coded Decimal (BCD) value where a "
597 "decimal point is implied between the 2nd and 3rd digits. "
598 "For example, a value of 0x103 indicates that version 1.03 "
599 "is supported."),
600 ModelCorrespondence { "CIM_USBController.InterfaceType" }]
601 uint16 ControllerVersion;
602 };
603
604
605 // ===================================================================
606 // VideoController
607 // ===================================================================
608 [Version ( "2.8.0" ), Description (
609 "Capabilities and management of the VideoController.")]
610 tony 1.1 class CIM_VideoController : CIM_Controller {
611
612 [Override ( "Description" ),
613 MappingStrings { "MIF.DMTF|Video|004.18" }]
614 string Description;
615
616 [Description (
617 "A free-form string describing the video "
618 "processor/Controller.")]
619 string VideoProcessor;
620
621 [Description (
622 "An integer enumeration indicating the type of video memory."),
623 ValueMap { "1", "2", "3", "4", "5", "6", "7", "8", "9", "10",
624 "11", "12", "13" },
625 Values { "Other", "Unknown", "VRAM", "DRAM", "SRAM", "WRAM",
626 "EDO RAM", "Burst Synchronous DRAM", "Pipelined Burst SRAM",
627 //10
628 "CDRAM", "3DRAM", "SDRAM", "SGRAM" },
629 MappingStrings { "MIF.DMTF|Video|004.6" }]
630 uint16 VideoMemoryType;
631 tony 1.1
632 [Description (
633 "Number of video pages supported given the current "
634 "resolutions and available memory.")]
635 uint32 NumberOfVideoPages;
636
637 [Description (
638 "Maximum amount of memory supported in bytes."),
639 Units ( "Bytes" )]
640 uint32 MaxMemorySupported;
641
642 [Description (
643 "An array of integers indicating the graphics and 3D "
644 "capabilities of the VideoController."),
645 ValueMap { "0", "1", "2", "3", "4", "5", "6", "7", "8" },
646 Values { "Unknown", "Other", "Graphics Accelerator",
647 "3D Accelerator", "PCI Fast Write", "MultiMonitor Support",
648 "PCI Mastering", "Second Monochrome Adapter Support",
649 "Large Memory Address Support" }, ArrayType ( "Indexed" ),
650 ModelCorrespondence {
651 "CIM_VideoController.CapabilityDescriptions" }]
652 tony 1.1 uint16 AcceleratorCapabilities[];
653
654 [Description (
655 "An array of free-form strings providing more detailed "
656 "explanations for any of the video Accelerator features "
657 "indicated in the Capabilities array. Note, each entry of "
658 "this array is related to the entry in the Capabilities "
659 "array that is located at the same index."),
660 ArrayType ( "Indexed" ),
661 ModelCorrespondence {
662 "CIM_VideoController.AcceleratorCapabilities" }]
663 string CapabilityDescriptions[];
664
665 [Description (
666 "The number of bits used to display each pixel."),
667 Units ( "Bits" ),
668 MappingStrings { "MIF.DMTF|Video|004.12" }]
669 uint32 CurrentBitsPerPixel;
670
671 [Description (
672 "Current number of horizontal pixels."),
673 tony 1.1 Units ( "Pixels" ),
674 MappingStrings { "MIF.DMTF|Video|004.11" }]
675 uint32 CurrentHorizontalResolution;
676
677 [Description (
678 "Current number of vertical pixels."),
679 Units ( "Pixels" ),
680 MappingStrings { "MIF.DMTF|Video|004.10" }]
681 uint32 CurrentVerticalResolution;
682
683 [Description (
684 "Maximum refresh rate of the VideoController in Hertz."),
685 Units ( "Hertz" ),
686 MappingStrings { "MIF.DMTF|Video|004.5" }]
687 uint32 MaxRefreshRate;
688
689 [Description (
690 "Minimum refresh rate of the Video Controller in Hertz."),
691 Units ( "Hertz" ),
692 MappingStrings { "MIF.DMTF|Video|004.4" }]
693 uint32 MinRefreshRate;
694 tony 1.1
695 [Description (
696 "Current refresh rate in Hertz."),
697 Units ( "Hertz" ),
698 MappingStrings { "MIF.DMTF|Video|004.15" }]
699 uint32 CurrentRefreshRate;
700
701 [Description (
702 "Current scan mode. \"Interlaced\" (value=3) or \"Non "
703 "Interlaced\" (4) can be defined using this property."),
704 ValueMap { "1", "2", "3", "4" },
705 Values { "Other", "Unknown", "Interlaced", "Non Interlaced" },
706 MappingStrings { "MIF.DMTF|Video|004.8" }]
707 uint16 CurrentScanMode;
708
709 [Description (
710 "If in character mode, number of rows for this Video "
711 "Controller. Otherwise, enter 0."),
712 MappingStrings { "MIF.DMTF|Video|004.13" }]
713 uint32 CurrentNumberOfRows;
714
715 tony 1.1 [Description (
716 "If in character mode, number of columns for this "
717 "VideoController. Otherwise, enter 0."),
718 MappingStrings { "MIF.DMTF|Video|004.14" }]
719 uint32 CurrentNumberOfColumns;
720
721 [Description (
722 "Number of colors supported at the current resolutions.")]
723 uint64 CurrentNumberOfColors;
724 };
725
726
727 // ===================================================================
728 // PCVideoController
729 // ===================================================================
730 [Version ( "2.6.0" ), Description (
731 "Capabilities and management of a PCVideoController, a subtype "
732 "of VideoController.")]
733 class CIM_PCVideoController : CIM_VideoController {
734
735 [Description (
736 tony 1.1 "The video architecture. For example, VGA (value=5) or PC-98 "
737 "(160) may be specified."),
738 ValueMap { "1", "2", "3", "4", "5", "6", "7", "8", "9", "10",
739 "11", "12", "160" },
740 Values { "Other", "Unknown", "CGA", "EGA", "VGA", "SVGA", "MDA",
741 "HGC", "MCGA",
742 // 10
743 "8514A", "XGA", "Linear Frame Buffer", "PC-98" },
744 MappingStrings { "MIF.DMTF|Video|004.2" }]
745 uint16 VideoArchitecture;
746
747 [Description (
748 "Current video mode."),
749 MappingStrings { "MIF.DMTF|Video|004.3" }]
750 uint16 VideoMode;
751
752 [Description (
753 "Current number of color planes. If this value is not "
754 "applicable for the current video configuration, enter 0.")]
755 uint16 NumberOfColorPlanes;
756 };
757 tony 1.1
758
759 // ===================================================================
760 // AGPVideoController
761 // ===================================================================
762 [Version ( "2.7.0" ), Description (
763 "Capabilities and management of an AGPVideoController.")]
764 class CIM_AGPVideoController : CIM_VideoController {
765
766 [Deprecated { "CIM_VideoController.AcceleratorCapabilities" },
767 Description (
768 "This property has been incorporated into the inherited "
769 "AcceleratorCapabilities property. Capabilities of the AGP "
770 "Graphics Controller. For example, the Device may support "
771 "multiple monitors, PCI Mastering and large memory "
772 "addresses. In this case, the values 3, 4 and 6 would be "
773 "written to the Capabilities array."),
774 ValueMap { "0", "1", "2", "3", "4", "5", "6" },
775 Values { "Unknown", "Other", "PCI Fast Write",
776 "MultiMonitor Support", "PCI Mastering",
777 "Second Monochrome Adapter Support",
778 tony 1.1 "Large Memory Address Support" }, ArrayType ( "Indexed" ),
779 ModelCorrespondence {
780 "CIM_AGPVideoController.CapabilityDescriptions" }]
781 uint16 Capabilities[];
782
783 [Description (
784 "Size of the non-local video memory in KB."),
785 Units ( "KiloBytes" )]
786 uint32 NonlocalVideoMemorySize;
787
788 [Description (
789 "Width of the internal bus in the graphics Controller, in "
790 "bits."),
791 Units ( "Bits" )]
792 uint32 LocalBusWidth;
793
794 [Description (
795 "An integer enumeration indicating the usage model of the "
796 "graphics Controller. Usage model indicates how the "
797 "Controller does manipulations of graphics surfaces, "
798 "textures, etc. in memory. DMA indicates that the graphics "
799 tony 1.1 "Controller brings structures from the system memory to its "
800 "local memory to perform needed manipulations or renderings. "
801 "Execute specifies that the graphics Controller can directly "
802 "access a specified region in main memory (called the "
803 "graphics aperture) using GART - Graphics Aperture Remapping "
804 "Table. It then performs manipulations in that range as if "
805 "that whole graphics aperture were part of its local memory. "
806 "A value of \"Both\" DMA and Execute models may also be "
807 "specified."),
808 ValueMap { "0", "1", "2", "3", "4" },
809 Values { "Unknown", "Other", "Execute", "DMA", "Both" }]
810 uint16 UsageModel;
811
812 [Description (
813 "An integer enumeration indicating the data transfer rate of "
814 "the graphics Controller."),
815 ValueMap { "0", "1", "2", "3", "4" },
816 Values { "Unknown", "Other", "1X", "2X", "4X" }]
817 uint16 DataTransferRate;
818
819 [Description (
820 tony 1.1 "An integer enumeration indicating the addressing mode of "
821 "the graphics Controller."),
822 ValueMap { "0", "1", "2", "3" },
823 Values { "Unknown", "Other", "Sideband", "Pipeline" }]
824 uint16 AddressingMode;
825
826 [Description (
827 "The maximum number of AGP Transaction requests that the "
828 "master (AGP Graphics Controller) is allowed to enqueue into "
829 "the target.")]
830 uint32 MaximumAGPCommandQueuePath;
831
832 [Description (
833 "The number of AGP Transaction that the core logic (chipset) "
834 "can accept into its transaction request queue from the "
835 "Controller.")]
836 uint32 MaxNumberOfPipelinedAGPTransactions;
837
838 [Description (
839 "Size of the graphics aperture in KB."),
840 Units ( "KiloBytes" )]
841 tony 1.1 uint32 GraphicsApertureSize;
842
843 [Description (
844 "A string containing the AGP specification version to which "
845 "this graphics Controller conforms.")]
846 string AGPSpecificationVersionConformance;
847 };
848
849
850 // ===================================================================
851 // VideoControllerResolution
852 // ===================================================================
853 [Version ( "2.6.0" ), Description (
854 "VideoControllerResolution describes the various video modes "
855 "that a VideoController can support. Video modes are defined by "
856 "the possible horizontal and vertical resolutions, refresh "
857 "rate, scan mode and number of colors settings supported by a "
858 "Controller. The actual resolutions, etc. that are in use, are "
859 "the values specified in the VideoController object.")]
860 class CIM_VideoControllerResolution : CIM_Setting {
861
862 tony 1.1 [Key, Override ( "SettingID" ), Description (
863 "The inherited SettingID serves as part of the key for a "
864 "VideoControllerResolution instance."),
865 MaxLen ( 256 )]
866 string SettingID;
867
868 [Description (
869 "Controller's horizontal resolution in Pixels."),
870 Units ( "Pixels" ),
871 MappingStrings { "MIF.DMTF|Monitor Resolutions|002.2" },
872 ModelCorrespondence {
873 "CIM_VideoController.CurrentHorizontalResolution" }]
874 uint32 HorizontalResolution;
875
876 [Description (
877 "Controller's vertical resolution in Pixels."),
878 Units ( "Pixels" ),
879 MappingStrings { "MIF.DMTF|Monitor Resolutions|002.3" },
880 ModelCorrespondence {
881 "CIM_VideoController.CurrentVerticalResolution" }]
882 uint32 VerticalResolution;
883 tony 1.1
884 [Description (
885 "Refresh rate in Hertz. If a range of rates is supported, "
886 "use the MinRefreshRate and MaxRefreshRate properties, and "
887 "set RefreshRate (this property) to 0."),
888 Units ( "Hertz" ),
889 MappingStrings { "MIF.DMTF|Monitor Resolutions|002.4" },
890 ModelCorrespondence { "CIM_VideoController.CurrentRefreshRate" }]
891 uint32 RefreshRate;
892
893 [Description (
894 "Minimum refresh rate in Hertz, when a range of rates is "
895 "supported at the specified resolutions."),
896 Units ( "Hertz" ),
897 MappingStrings { "MIF.DMTF|Monitor Resolutions|002.6" },
898 ModelCorrespondence { "CIM_VideoController.MinRefreshRate" }]
899 uint32 MinRefreshRate;
900
901 [Description (
902 "Maximum refresh rate in Hertz, when a range of rates is "
903 "supported at the specified resolutions."),
904 tony 1.1 Units ( "Hertz" ),
905 MappingStrings { "MIF.DMTF|Monitor Resolutions|002.7" },
906 ModelCorrespondence { "CIM_VideoController.MaxRefreshRate" }]
907 uint32 MaxRefreshRate;
908
909 [Description (
910 "Integer indicating whether the Controller operates in "
911 "interlaced (value=5) or non-interlaced (4) mode."),
912 ValueMap { "1", "2", "3", "4", "5" },
913 Values { "Other", "Unknown", "Not Supported",
914 "Non-Interlaced Operation", "Interlaced Operation" },
915 MappingStrings { "MIF.DMTF|Monitor Resolutions|002.5" },
916 ModelCorrespondence { "CIM_VideoController.CurrentScanMode" }]
917 uint16 ScanMode;
918
919 [Description (
920 "Number of colors supported at the current resolutions."),
921 ModelCorrespondence {
922 "CIM_VideoController.CurrentNumberOfColors" }]
923 uint64 NumberOfColors;
924 };
925 tony 1.1
926
927 // ===================================================================
928 // VideoSetting
929 // ===================================================================
930 [Association, Version ( "2.6.0" ), Description (
931 "VideoSetting associates the VideoControllerResolution Setting "
932 "with the Controller(s) to which it applies.")]
933 class CIM_VideoSetting : CIM_ElementSetting {
934
935 [Override ( "Element" ), Description (
936 "The VideoController.")]
937 CIM_VideoController REF Element;
938
939 [Override ( "Setting" ), Description (
940 "The resolutions, refresh rates, scan mode and number of "
941 "colors that can be set for the Controller.")]
942 CIM_VideoControllerResolution REF Setting;
943 };
944
945
946 tony 1.1 // ===================================================================
947 // PCIController
948 // ===================================================================
949 [Version ( "2.6.0" ), Description (
950 "PCIController is a superclass for the PCIBridge and PCIDevice "
951 "classes. These classes model adapters and bridges on a PCI "
952 "bus. The properties in PCIController and its subclasses are "
953 "defined in the various PCI Specifications published by the PCI "
954 "SIG.")]
955 class CIM_PCIController : CIM_Controller {
956
957 [Description (
958 "Current contents of the register that provides basic "
959 "control over the device's ability to respond to, and/or "
960 "perform PCI accesses.")]
961 uint16 CommandRegister;
962
963 [Description (
964 "An array of integers indicating controller capabilities. "
965 "Information such as \"Supports 66MHz\" (value=2) is "
966 "specified in this property. The data in the Capabilities "
967 tony 1.1 "array is gathered from the PCI Status Register and the PCI "
968 "Capabilities List as defined in the PCI Specification."),
969 ValueMap { "0", "1", "2", "3", "4", "5", "6", "7", "8", "9",
970 "10", "11", "12" },
971 Values { "Unknown", "Other", "Supports 66MHz",
972 "Supports User Definable Features",
973 "Supports Fast Back-to-Back Transactions", "PCI-X Capable",
974 "PCI Power Management Supported",
975 "Message Signaled Interrupts Supported",
976 "Parity Error Recovery Capable", "AGP Supported",
977 // 10
978 "Vital Product Data Supported",
979 "Provides Slot Identification", "Hot Swap Supported" },
980 ArrayType ( "Indexed" ),
981 ModelCorrespondence { "CIM_PCIController.CapabilityDescriptions"
982 }]
983 uint16 Capabilities[];
984
985 [Description (
986 "An array of free-form strings providing more detailed "
987 "explanations for any of the PCIController features "
988 tony 1.1 "indicated in the Capabilities array. Note, each entry of "
989 "this array is related to the entry in the Capabilities "
990 "array that is located at the same index."),
991 ArrayType ( "Indexed" ),
992 ModelCorrespondence { "CIM_PCIController.Capabilities" }]
993 string CapabilityDescriptions[];
994
995 [Description (
996 "The slowest device select timing for a target device."),
997 ValueMap { "0", "1", "2", "3", "4", "5" },
998 Values { "Unknown", "Other", "Fast", "Medium", "Slow",
999 "Reserved" }]
1000 uint16 DeviceSelectTiming;
1001
1002 [Description (
1003 "Register of 8 bits that identifies the basic function of "
1004 "the PCI device. This is only the upper byte (offset 0Bh) of "
1005 "the 3 byte ClassCode field. Note that the property's "
1006 "ValueMap array specifies the decimal representation of this "
1007 "information."),
1008 ValueMap { "0", "1", "2", "3", "4", "5", "6", "7", "8", "9",
1009 tony 1.1 "10", "11", "12", "13", "14", "15", "16", "17", "18..254",
1010 "255" },
1011 Values { "Pre 2.0", "Mass Storage", "Network", "Display",
1012 "Multimedia", "Memory", "Bridge", "Simple Communications",
1013 "Base Peripheral", "Input",
1014 // 10
1015 "Docking Station", "Processor", "Serial Bus", "Wireless",
1016 "Intelligent I/O", "Satellite Communication",
1017 "Encryption/Decryption",
1018 "Data Acquisition and Signal Processing",
1019 // 18 - 255
1020 "PCI Reserved", "Other" }]
1021 uint8 ClassCode;
1022
1023 [Description (
1024 "Specifies the system cache line size in doubleword "
1025 "increments (e.g., a 486-based system would store the value "
1026 "04h, indicating a cache line size of four doublewords."),
1027 Units ( "DoubleWords" )]
1028 uint8 CacheLineSize;
1029
1030 tony 1.1 [Description (
1031 "Defines the minimum amount of time, in PCI clock cycles, "
1032 "that the bus master can retain ownership of the bus."),
1033 Units ( "PCI clock cycles" )]
1034 uint8 LatencyTimer;
1035
1036 [Description (
1037 "Defines the PCI interrupt request pin (INTA# to INTD#) to "
1038 "which a PCI functional device is connected."),
1039 ValueMap { "0", "1", "2", "3", "4", "5" },
1040 Values { "None", "INTA#", "INTB#", "INTC#", "INTD#", "Unknown" }]
1041 uint16 InterruptPin;
1042
1043 [Description (
1044 "Doubleword Expansion ROM base memory address."),
1045 Units ( "DoubleWords" )]
1046 uint32 ExpansionROMBaseAddress;
1047
1048 [Description (
1049 "Reports if the PCI device can perform the self test "
1050 "function. Returns bit 7 of the BIST register as a boolean.")]
1051 tony 1.1 boolean SelfTestEnabled;
1052
1053 [Description (
1054 "Method to invoke PCI device self-test. This method sets bit "
1055 "6 of the BIST register. The return result is the lower four "
1056 "bits of the BIST register where 0 indicates success and "
1057 "non-zero is a device dependent failure. Support for this "
1058 "method is optional in the PCI Specification.")]
1059 uint8 BISTExecution( );
1060 };
1061
1062
1063 // ===================================================================
1064 // PCIDevice
1065 // ===================================================================
1066 [Version ( "2.6.0" ), Description (
1067 "Capabilities and management of a PCI device controller on an "
1068 "adapter card.")]
1069 class CIM_PCIDevice : CIM_PCIController {
1070
1071 [Description (
1072 tony 1.1 "Array of doubleword base memory addresses.")]
1073 uint32 BaseAddress[6];
1074
1075 [Description (
1076 "Subsystem identifier code.")]
1077 uint16 SubsystemID;
1078
1079 [Description (
1080 "Subsystem vendor ID. ID information is reported from a "
1081 "PCIDevice via protocol-specific requests. The correct place "
1082 "in the CIM Schema for this information is in CIM_Physical "
1083 "Element (the Manufacturer property) for hardware, and "
1084 "CIM_Product (the Vendor property) if the information is "
1085 "related to Product acquisition. This data is also reported "
1086 "here since it is part of the standard output from the "
1087 "Device, and as an optimization.")]
1088 uint16 SubsystemVendorID;
1089
1090 [Description (
1091 "Register indiating how long the master would like to retain "
1092 "PCI bus ownership whenever it initiates a transaction. A "
1093 tony 1.1 "zero value indicates no requirement."),
1094 Units ( "250 nanoseconds" )]
1095 uint8 MinGrantTime;
1096
1097 [Description (
1098 "Register specifying how often the device needs access to "
1099 "the PCI bus in 250ns. A zero value indicates no "
1100 "requirement."),
1101 Units ( "250 nanoseconds" )]
1102 uint8 MaxLatency;
1103 };
1104
1105
1106 // ===================================================================
1107 // PCIBridge
1108 // ===================================================================
1109 [Version ( "2.6.0" ), Description (
1110 "Capabilities and management of a PCI controller providing "
1111 "bridge to bridge capability.")]
1112 class CIM_PCIBridge : CIM_PCIController {
1113
1114 tony 1.1 [Description (
1115 "Array of doubleword base memory addresses.")]
1116 uint32 BaseAddress[2];
1117
1118 [Description (
1119 "The type of bridge. Except for \"Host\" (value=0), the type "
1120 "of bridge is PCI to <value>. For type \"Host\", the device "
1121 "is a Host to PCI bridge."),
1122 ValueMap { "0", "1", "2", "3", "4", "5", "6", "7", "8", "128" },
1123 Values { "Host", "ISA", "EISA", "Micro Channel", "PCI",
1124 "PCMCIA", "NuBus", "CardBus", "RACEway",
1125 // 128
1126 "Other" }]
1127 uint16 BridgeType;
1128
1129 [Description (
1130 "The timeslice for the secondary interface when the bridge "
1131 "is acting as an initiator. A zero value indicates no "
1132 "requirement."),
1133 Units ( "PCI clock cycles" )]
1134 uint8 SecondaryLatencyTimer;
1135 tony 1.1
1136 [Description (
1137 "The number of the highest numbered bus that exists behind "
1138 "the bridge.")]
1139 uint8 SubordinateBusNumber;
1140
1141 [Description (
1142 "The number of the PCI bus segment to which the secondary "
1143 "interface of the bridge is connected.")]
1144 uint8 SecondayBusNumber;
1145
1146 [Description (
1147 "The number of the PCI bus segment to which the primary "
1148 "interface of the bridge is connected.")]
1149 uint8 PrimaryBusNumber;
1150
1151 [Description (
1152 "The contents of the Bridge's SecondaryStatusRegister. For "
1153 "more information on the contents of this register, refer to "
1154 "the PCI-to-PCI Bridge Architecture Specification.")]
1155 uint16 SecondaryStatusRegister;
1156 tony 1.1
1157 [Description (
1158 "The slowest device select timing for a target device on the "
1159 "secondary bus."),
1160 ValueMap { "0", "1", "2", "3", "4", "5" },
1161 Values { "Unknown", "Other", "Fast", "Medium", "Slow",
1162 "Reserved" }]
1163 uint16 SecondaryBusDeviceSelectTiming;
1164
1165 [Description (
1166 "End address of the I/O addresses supported by the bus. The "
1167 "upper four bits of this property specify the address bits, "
1168 "AD[15::12], of the I/O address. The remaining 12 bits of "
1169 "the I/O address are assumed to be all 1's.")]
1170 uint8 IOLimit;
1171
1172 [Description (
1173 "Base address of I/O addresses supported by the bus. The "
1174 "upper four bits of this property specify the address bits, "
1175 "AD[15::12], of the I/O address. The remaining 12 bits of "
1176 "the I/O address are assumed to be 0.")]
1177 tony 1.1 uint8 IOBase;
1178
1179 [Description (
1180 "End address of the memory supported by the bus. The upper "
1181 "twelve bits of this property specify the address bits, "
1182 "AD[31::20], of a 32-bit memory address. The remaining 20 "
1183 "bits of the address are assumed to be all 1's.")]
1184 uint16 MemoryLimit;
1185
1186 [Description (
1187 "Base address of the memory supported by the bus. The upper "
1188 "twelve bits of this property specify the address bits, "
1189 "AD[31::20], of a 32-bit memory address. The remaining 20 "
1190 "bits of the address are assumed to be 0.")]
1191 uint16 MemoryBase;
1192
1193 [Description (
1194 "End address of the memory that can be prefetched by the "
1195 "bus. The upper twelve bits of this property specify the "
1196 "address bits, AD[31::20], of a 32-bit memory address. The "
1197 "remaining 20 bits of the address are assumed to be all 1's.")]
1198 tony 1.1 uint16 PrefetchMemoryLimit;
1199
1200 [Description (
1201 "Base address of the memory that can be prefetched by the "
1202 "bus. The upper twelve bits of this property specify the "
1203 "address bits, AD[31::20], of a 32-bit memory address. The "
1204 "remaining 20 bits of the address are assumed to be 0.")]
1205 uint16 PrefetchMemoryBase;
1206
1207 [Description (
1208 "Upper 32 bits of the supported prefetch end address when "
1209 "64-bit addressing is used. The lower 32 bits are assumed to "
1210 "be all 1's.")]
1211 uint32 PrefetchLimitUpper32;
1212
1213 [Description (
1214 "Upper 32 bits of the supported prefetch base address when "
1215 "64-bit addressing is used. The lower 32 bits are assumed to "
1216 "be 0.")]
1217 uint32 PrefetchBaseUpper32;
1218
1219 tony 1.1 [Description (
1220 "Upper 16 bits of the supported I/O end address when 32-bit "
1221 "I/O addressing is used. The lower 16 bits are assumed to be "
1222 "all 1's.")]
1223 uint16 IOLimitUpper16;
1224
1225 [Description (
1226 "Upper 16 bits of the supported I/O base address when 32-bit "
1227 "I/O addressing is used. The lower 16 bits are assumed to be "
1228 "0.")]
1229 uint16 IOBaseUpper16;
1230 };
1231
1232
1233 // ==================================================================
1234 // PortController
1235 // ==================================================================
1236 [Version ( "2.8.0" ), Description (
1237 "PortController is a logical device corresponding to a hardware "
1238 "network port controller. Port controllers provide various "
1239 "features depending on their types and versions.")]
1240 tony 1.1 class CIM_PortController : CIM_Controller {
1241
1242 [Description (
1243 "The type or model of the port controller. Specific values "
1244 "will be enumerated in a later release of this schema. When "
1245 "set to 1 (\"Other\"), the related property "
1246 "OtherControllerType contains a string description of the "
1247 "controller's type."),
1248 ValueMap { "0", "1", "2", "3", "4", "5", "6", "7", "8" },
1249 Values { "Unknown", "Other", "Ethernet", "IB", "FC", "FDDI",
1250 "ATM", "Token Ring", "Frame Relay" },
1251 ModelCorrespondence { "CIM_PortController.OtherControllerType" }]
1252 uint16 ControllerType;
1253
1254 [Description (
1255 "A string value for controller types not captured by the "
1256 "ControllerType enumeration. This should only be used when "
1257 "the value of the ControllerType property is set to 1, "
1258 "\"Other\"."),
1259 ModelCorrespondence { "CIM_PortController.ControllerType" }]
1260 string OtherControllerType;
1261 tony 1.1
1262 [Description (
1263 "The revision number of the controller.")]
1264 uint16 ControllerVersion;
1265 };
1266
1267
1268 // ===================================================================
1269 // end of file
1270 // ===================================================================
|
Return to
Device28_Controller.mof
CVS log
Up to [Pegasus] / pegasus / Schemas / CIM28