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File: [Pegasus] / pegasus / Schemas / CIM231 / DMTF / Physical / CIM_PhysicalMemory.mof
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Revision: 1.1, Tue Jan 24 13:50:27 2012 UTC (12 years, 5 months ago) by marek Branch: MAIN CVS Tags: preBug9676, postBug9676, TASK-TASK_PEP362_RestfulService_branch-root, TASK-TASK_PEP362_RestfulService_branch-merged_out_from_trunk, TASK-TASK_PEP362_RestfulService_branch-merged_in_to_trunk, TASK-TASK_PEP362_RestfulService_branch-merged_in_from_branch, TASK-TASK_PEP362_RestfulService_branch-branch, TASK-PEP362_RestfulService-root, TASK-PEP362_RestfulService-merged_out_to_branch, TASK-PEP362_RestfulService-merged_out_from_trunk, TASK-PEP362_RestfulService-merged_in_to_trunk, TASK-PEP362_RestfulService-merged_in_from_branch, TASK-PEP362_RestfulService-branch, TASK-PEP317_pullop-merged_out_from_trunk, TASK-PEP317_pullop-merged_in_to_trunk, RELEASE_2_14_1, RELEASE_2_14_0-RC2, RELEASE_2_14_0-RC1, RELEASE_2_14_0, RELEASE_2_14-root, RELEASE_2_14-branch, RELEASE_2_13_0-RC2, RELEASE_2_13_0-RC1, RELEASE_2_13_0-FC, RELEASE_2_13_0, RELEASE_2_13-root, RELEASE_2_13-branch, RELEASE_2_12_1-RC1, RELEASE_2_12_1, RELEASE_2_12_0-RC1, RELEASE_2_12_0-FC, RELEASE_2_12_0, RELEASE_2_12-root, RELEASE_2_12-branch, HEAD, CIMRS_WORK_20130824 Branch point for: TASK-PEP317_pullop-branch BUG#:9155 TITLE: Upgrade Pegasus to Include the CIM 2.31 Schema in CVS DESCRIPTION: |
// Copyright (c) 2008 DMTF. All rights reserved. [Version ( "2.18.0" ), UMLPackagePath ( "CIM::Physical::Component" ), Description ( "PhysicalMemory is a subclass of CIM_Chip, representing low " "level memory devices - SIMMS, DIMMs, raw memory chips, etc." )] class CIM_PhysicalMemory : CIM_Chip { [Override ( "FormFactor" ), MappingStrings { "MIF.DMTF|Memory Device|005.6" }] uint16 FormFactor; [Description ( "The type of PhysicalMemory. Synchronous DRAM is also " "known as SDRAM Cache DRAM is also known as CDRAM CDRAM " "is also known as Cache DRAM SDRAM is also known as " "Synchronous DRAM BRAM is also known as Block RAM" ), ValueMap { "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12", "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23", "24", "25", "26..32567", "32568..65535" }, Values { "Unknown", "Other", "DRAM", "Synchronous DRAM", "Cache DRAM", "EDO", "EDRAM", "VRAM", "SRAM", "RAM", //10 "ROM", "Flash", "EEPROM", "FEPROM", "EPROM", "CDRAM", "3DRAM", "SDRAM", "SGRAM", "RDRAM", // 20 "DDR", "DDR-2", "BRAM", "FB-DIMM", "DDR3", "FBD2", "DMTF Reserved", "Vendor Reserved" }, MappingStrings { "MIF.DMTF|Memory Device|005.9" }] uint16 MemoryType; [Description ( "Total width, in bits, of the PhysicalMemory, including " "check or error correction bits. If there are no error " "correction bits, the value in this property should match " "that specified for DataWidth." ), Units ( "Bits" ), MappingStrings { "MIF.DMTF|Memory Device|005.7" }] uint16 TotalWidth; [Description ( "Data width of the PhysicalMemory, in bits. A data width " "of 0 and a TotalWidth of 8 would indicate that the " "Memory is solely used to provide error correction bits." ), Units ( "Bits" ), MappingStrings { "MIF.DMTF|Memory Device|005.8" }] uint16 DataWidth; [Description ( "The speed of the PhysicalMemory, in nanoseconds." ), Units ( "NanoSeconds" ), MappingStrings { "MIF.DMTF|Memory Device|005.24" }] uint32 Speed; [Description ( "The total capacity of this PhysicalMemory, in bytes." ), Units ( "Bytes" ), MappingStrings { "MIF.DMTF|Memory Device|005.5" }] uint64 Capacity; [Description ( "A string identifying the physically labeled bank where " "the Memory is located - for example, \'Bank 0\' or \'Bank " "A\'." ), MaxLen ( 64 ), MappingStrings { "MIF.DMTF|Memory Device|005.4" }] string BankLabel; [Description ( "Specifies the position of the PhysicalMemory in a \'row\'. " "For example, if it takes two 8-bit memory devices to " "form a 16- bit row, then a value of \'2\'means that this " "Memory is the second device. 0 is an invalid value for " "this property." ), MappingStrings { "MIF.DMTF|Memory Device Mapped Addresses|001.6" }] uint32 PositionInRow; [Description ( "The position of this PhysicalMemory in an interleave. 0 " "indicates non-interleaved. 1 indicates the first " "position, 2 the second position and so on. For example, " "in a 2:1 interleave, a value of \'1\' would indicate " "that the Memory is in the \'even\' position." ), MappingStrings { "MIF.DMTF|Memory Device Mapped Addresses|001.7" }] uint32 InterleavePosition; };
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